arm64: dts: marvell: enable GICP and ICU on Armada 7K/8K
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Wed, 21 Jun 2017 13:29:17 +0000 (15:29 +0200)
committerGregory CLEMENT <gregory.clement@free-electrons.com>
Wed, 21 Jun 2017 15:09:48 +0000 (17:09 +0200)
This commit modifies the Marvell EBU Armada 7K and 8K Device Tree files
to describe the ICU and GICP units, and use ICU interrupts for all
devices in the CP110 blocks.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
arch/arm64/boot/dts/marvell/armada-ap806.dtsi
arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi

index 2557d69fefc8b0557563d9802e0a420eaeb961ba..1eb1f1e9aac4cfb36d2de827ff8c5bd4970a3ad0 100644 (file)
                                marvell,spi-base = <128>, <136>, <144>, <152>;
                        };
 
+                       gicp: gicp@3f0040 {
+                               compatible = "marvell,ap806-gicp";
+                               reg = <0x3f0040 0x10>;
+                               marvell,spi-ranges = <64 64>, <288 64>;
+                               msi-controller;
+                       };
+
                        pic: interrupt-controller@3f0100 {
                                compatible = "marvell,armada-8k-pic";
                                reg = <0x3f0100 0x10>;
index 7835d4f517dcba703220c5b44619e2e717660c0d..aec5f94423dd0e56b8727faf0e609eb0b43aa840 100644 (file)
  * Device Tree file for Marvell Armada CP110 Master.
  */
 
+#define ICU_GRP_NSR 0x0
+
 / {
        cp110-master {
                #address-cells = <2>;
                #size-cells = <2>;
                compatible = "simple-bus";
-               interrupt-parent = <&gic>;
+               interrupt-parent = <&cpm_icu>;
                ranges;
 
                config-space@f2000000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
                        compatible = "simple-bus";
-                       interrupt-parent = <&gic>;
                        ranges = <0x0 0x0 0xf2000000 0x2000000>;
 
                        cpm_ethernet: ethernet@0 {
                                dma-coherent;
 
                                cpm_eth0: eth0 {
-                                       interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+                                       interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>;
                                        port-id = <0>;
                                        gop-port-id = <0>;
                                        status = "disabled";
                                };
 
                                cpm_eth1: eth1 {
-                                       interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
+                                       interrupts = <ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH>;
                                        port-id = <1>;
                                        gop-port-id = <2>;
                                        status = "disabled";
                                };
 
                                cpm_eth2: eth2 {
-                                       interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
+                                       interrupts = <ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH>;
                                        port-id = <2>;
                                        gop-port-id = <3>;
                                        status = "disabled";
                                status = "disabled";
                        };
 
+                       cpm_icu: interrupt-controller@1e0000 {
+                               compatible = "marvell,cp110-icu";
+                               reg = <0x1e0000 0x10>;
+                               #interrupt-cells = <3>;
+                               interrupt-controller;
+                               msi-parent = <&gicp>;
+                       };
+
                        cpm_syscon0: system-controller@440000 {
                                compatible = "syscon", "simple-mfd";
                                reg = <0x440000 0x1000>;
                                compatible = "marvell,armada-8k-rtc";
                                reg = <0x284000 0x20>, <0x284080 0x24>;
                                reg-names = "rtc", "rtc-soc";
-                               interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <ICU_GRP_NSR 77 IRQ_TYPE_LEVEL_HIGH>;
                        };
 
                        cpm_sata0: sata@540000 {
                                compatible = "marvell,armada-8k-ahci",
                                             "generic-ahci";
                                reg = <0x540000 0x30000>;
-                               interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&cpm_clk 1 15>;
                                status = "disabled";
                        };
                                             "generic-xhci";
                                reg = <0x500000 0x4000>;
                                dma-coherent;
-                               interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <ICU_GRP_NSR 106 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&cpm_clk 1 22>;
                                status = "disabled";
                        };
                                             "generic-xhci";
                                reg = <0x510000 0x4000>;
                                dma-coherent;
-                               interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <ICU_GRP_NSR 105 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&cpm_clk 1 23>;
                                status = "disabled";
                        };
                                reg = <0x701000 0x20>;
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <ICU_GRP_NSR 120 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&cpm_clk 1 21>;
                                status = "disabled";
                        };
                                reg = <0x701100 0x20>;
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <ICU_GRP_NSR 121 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&cpm_clk 1 21>;
                                status = "disabled";
                        };
                        cpm_trng: trng@760000 {
                                compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
                                reg = <0x760000 0x7d>;
-                               interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <ICU_GRP_NSR 95 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&cpm_clk 1 25>;
                                status = "okay";
                        };
                        cpm_sdhci0: sdhci@780000 {
                                compatible = "marvell,armada-cp110-sdhci";
                                reg = <0x780000 0x300>;
-                               interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <ICU_GRP_NSR 27 IRQ_TYPE_LEVEL_HIGH>;
                                clock-names = "core";
                                clocks = <&cpm_clk 1 4>;
                                dma-coherent;
                        cpm_crypto: crypto@800000 {
                                compatible = "inside-secure,safexcel-eip197";
                                reg = <0x800000 0x200000>;
-                               interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING
+                               interrupts = <ICU_GRP_NSR 87 (IRQ_TYPE_EDGE_RISING
                                | IRQ_TYPE_LEVEL_HIGH)>,
-                                            <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+                                            <ICU_GRP_NSR 88 IRQ_TYPE_LEVEL_HIGH>,
+                                            <ICU_GRP_NSR 89 IRQ_TYPE_LEVEL_HIGH>,
+                                            <ICU_GRP_NSR 90 IRQ_TYPE_LEVEL_HIGH>,
+                                            <ICU_GRP_NSR 91 IRQ_TYPE_LEVEL_HIGH>,
+                                            <ICU_GRP_NSR 92 IRQ_TYPE_LEVEL_HIGH>;
                                interrupt-names = "mem", "ring0", "ring1",
                                "ring2", "ring3", "eip";
                                clocks = <&cpm_clk 1 26>;
                                /* non-prefetchable memory */
                                0x82000000 0 0xf6000000 0  0xf6000000 0 0xf00000>;
                        interrupt-map-mask = <0 0 0 0>;
-                       interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>;
                        num-lanes = <1>;
                        clocks = <&cpm_clk 1 13>;
                        status = "disabled";
                                /* non-prefetchable memory */
                                0x82000000 0 0xf7000000 0  0xf7000000 0 0xf00000>;
                        interrupt-map-mask = <0 0 0 0>;
-                       interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>;
 
                        num-lanes = <1>;
                        clocks = <&cpm_clk 1 11>;
                                /* non-prefetchable memory */
                                0x82000000 0 0xf8000000 0  0xf8000000 0 0xf00000>;
                        interrupt-map-mask = <0 0 0 0>;
-                       interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 0 &cpm_icu 0 ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>;
 
                        num-lanes = <1>;
                        clocks = <&cpm_clk 1 12>;
index 22e4feb1bacecaa655aae0ac906316f77cea52cc..9daf1e17bdfea0e26884973a7c8dc2340976946c 100644 (file)
  * Device Tree file for Marvell Armada CP110 Slave.
  */
 
+#define ICU_GRP_NSR 0x0
+
 / {
        cp110-slave {
                #address-cells = <2>;
                #size-cells = <2>;
                compatible = "simple-bus";
-               interrupt-parent = <&gic>;
+               interrupt-parent = <&cps_icu>;
                ranges;
 
                config-space@f4000000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
                        compatible = "simple-bus";
-                       interrupt-parent = <&gic>;
                        ranges = <0x0 0x0 0xf4000000 0x2000000>;
 
                        cps_rtc: rtc@284000 {
                                dma-coherent;
 
                                cps_eth0: eth0 {
-                                       interrupts = <GIC_SPI 261 IRQ_TYPE_LEVEL_HIGH>;
+                                       interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>;
                                        port-id = <0>;
                                        gop-port-id = <0>;
                                        status = "disabled";
                                };
 
                                cps_eth1: eth1 {
-                                       interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>;
+                                       interrupts = <ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH>;
                                        port-id = <1>;
                                        gop-port-id = <2>;
                                        status = "disabled";
                                };
 
                                cps_eth2: eth2 {
-                                       interrupts = <GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
+                                       interrupts = <ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH>;
                                        port-id = <2>;
                                        gop-port-id = <3>;
                                        status = "disabled";
                                status = "disabled";
                        };
 
+                       cps_icu: interrupt-controller@1e0000 {
+                               compatible = "marvell,cp110-icu";
+                               reg = <0x1e0000 0x10>;
+                               #interrupt-cells = <3>;
+                               interrupt-controller;
+                               msi-parent = <&gicp>;
+                       };
+
                        cps_syscon0: system-controller@440000 {
                                compatible = "syscon", "simple-mfd";
                                reg = <0x440000 0x1000>;
                                compatible = "marvell,armada-8k-ahci",
                                             "generic-ahci";
                                reg = <0x540000 0x30000>;
-                               interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <ICU_GRP_NSR 107 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&cps_clk 1 15>;
                                status = "disabled";
                        };
                                             "generic-xhci";
                                reg = <0x500000 0x4000>;
                                dma-coherent;
-                               interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <ICU_GRP_NSR 106 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&cps_clk 1 22>;
                                status = "disabled";
                        };
                                             "generic-xhci";
                                reg = <0x510000 0x4000>;
                                dma-coherent;
-                               interrupts = <GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <ICU_GRP_NSR 105 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&cps_clk 1 23>;
                                status = "disabled";
                        };
                                reg = <0x701000 0x20>;
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               interrupts = <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <ICU_GRP_NSR 120 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&cps_clk 1 21>;
                                status = "disabled";
                        };
                                reg = <0x701100 0x20>;
                                #address-cells = <1>;
                                #size-cells = <0>;
-                               interrupts = <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <ICU_GRP_NSR 121 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&cps_clk 1 21>;
                                status = "disabled";
                        };
                        cps_trng: trng@760000 {
                                compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
                                reg = <0x760000 0x7d>;
-                               interrupts = <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>;
+                               interrupts = <ICU_GRP_NSR 95 IRQ_TYPE_LEVEL_HIGH>;
                                clocks = <&cps_clk 1 25>;
                                status = "okay";
                        };
                        cps_crypto: crypto@800000 {
                                compatible = "inside-secure,safexcel-eip197";
                                reg = <0x800000 0x200000>;
-                               interrupts = <GIC_SPI 34 (IRQ_TYPE_EDGE_RISING
+                               interrupts = <ICU_GRP_NSR 87 (IRQ_TYPE_EDGE_RISING
                                | IRQ_TYPE_LEVEL_HIGH)>,
-                                            <GIC_SPI 278 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 281 IRQ_TYPE_LEVEL_HIGH>,
-                                            <GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>;
+                                            <ICU_GRP_NSR 88 IRQ_TYPE_LEVEL_HIGH>,
+                                            <ICU_GRP_NSR 89 IRQ_TYPE_LEVEL_HIGH>,
+                                            <ICU_GRP_NSR 90 IRQ_TYPE_LEVEL_HIGH>,
+                                            <ICU_GRP_NSR 91 IRQ_TYPE_LEVEL_HIGH>,
+                                            <ICU_GRP_NSR 92 IRQ_TYPE_LEVEL_HIGH>;
                                interrupt-names = "mem", "ring0", "ring1",
                                                  "ring2", "ring3", "eip";
                                clocks = <&cps_clk 1 26>;
                                /* non-prefetchable memory */
                                0x82000000 0 0xfa000000 0  0xfa000000 0 0xf00000>;
                        interrupt-map-mask = <0 0 0 0>;
-                       interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <ICU_GRP_NSR 22 IRQ_TYPE_LEVEL_HIGH>;
                        num-lanes = <1>;
                        clocks = <&cps_clk 1 13>;
                        status = "disabled";
                                /* non-prefetchable memory */
                                0x82000000 0 0xfb000000 0  0xfb000000 0 0xf00000>;
                        interrupt-map-mask = <0 0 0 0>;
-                       interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts = <GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <ICU_GRP_NSR 24 IRQ_TYPE_LEVEL_HIGH>;
 
                        num-lanes = <1>;
                        clocks = <&cps_clk 1 11>;
                                /* non-prefetchable memory */
                                0x82000000 0 0xfc000000 0  0xfc000000 0 0xf00000>;
                        interrupt-map-mask = <0 0 0 0>;
-                       interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
-                       interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-map = <0 0 0 0 &cps_icu 0 ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupts = <ICU_GRP_NSR 23 IRQ_TYPE_LEVEL_HIGH>;
 
                        num-lanes = <1>;
                        clocks = <&cps_clk 1 12>;