[9610] arm64: dts: Add UART switch for CP
authorJiyoung Jeong <ji_0.jeong@samsung.com>
Tue, 24 Jul 2018 12:39:04 +0000 (21:39 +0900)
committerhskang <hs1218.kang@samsung.com>
Mon, 27 Aug 2018 23:43:31 +0000 (08:43 +0900)
Add UART switch for CP in modem-ss360ap-sit-pdata.dtsi

Change-Id: Id20d6e4e29fce004e383509969e6447fed58f96c
Signed-off-by: Jiyoung Jeong <ji_0.jeong@samsung.com>
arch/arm64/boot/dts/exynos/modem-ss360ap-sit-pdata.dtsi

index cc891bff02dad379900de70f613f66ee544b408b..80029d47615fee335d21e18676ac6dbb4a39c567 100644 (file)
                                mif,link_attrs = <0x7C8>;       /* XMIT_BTDLR(0x400) | DUMP_ALIGNED (0x200) | BOOT_ALIGNED (0x100) | MEM_DUMP (0x80) | MEM_BOOT (0x40) | DPRAM_MAGIC (0x08) */
                                mif,num_iodevs = <20>;
 
+                               /* use usb path */
+                               mif,use_usb_phy = <0>;
+
                                /* sim socket num */
                                mif,sim_socket_num = <2>;
 
-                               /* mbox pdata */
-                               mbx_ap2cp_msg = <0>;
-                               mbx_cp2ap_msg = <1>;
-                               mbx_ap2cp_united_status = <2>;
-                               mbx_cp2ap_united_status = <3>;
-                               mbx_ap2cp_mif_value = <4>;
-                               mbx_ap2cp_kerneltime = <9>;
-                               mbx_cp2ap_pcie_l1ss_disable = <17>;
-
+                               /* Mailbox interrupt number from AP to CP */
                                mif,int_ap2cp_msg = <0>;
                                mif,int_ap2cp_wakeup = <1>;
                                mif,int_ap2cp_status = <2>;
                                mif,int_ap2cp_active = <3>;
+                               mif,int_ap2cp_uart_noti = <15>;
 
+                               /* Mailbox interrupt number from CP to AP */
                                mif,irq_cp2ap_msg = <0>;
                                mif,irq_cp2ap_status = <2>;
                                mif,irq_cp2ap_active = <3>;
+                               mif,irq_cp2ap_perf_req_cpu = <5>; /* CP2AP_DVFSREQ_CPU */
+                               mif,irq_cp2ap_perf_req_mif = <6>; /* CP2AP_DVFSREQ_MIF */
+                               mif,irq_cp2ap_perf_req_int = <7>; /* CP2AP_DVFSREQ_INT */
                                mif,irq_cp2ap_wake_lock = <8>;
                                mif,irq_cp2ap_pcie_l1ss_disable = <9>;
 
-                               /* mbox pdata for performance request */
+                               /* Mailbox shared data number */
+                               mbx_ap2cp_msg = <0>;
+                               mbx_cp2ap_msg = <1>;
+                               mbx_ap2cp_united_status = <2>;
+                               mbx_cp2ap_united_status = <3>;
                                mbx_cp2ap_dvfsreq = <4>;
                                mbx_cp2ap_dvfsreq_cpu = <5>;
                                mbx_cp2ap_dvfsreq_mif = <6>;
                                mbx_cp2ap_dvfsreq_int = <7>;
+                               mbx_ap2cp_kerneltime = <9>;
+                               mbx_cp2ap_pcie_l1ss_disable = <17>;
 
-                               mif,irq_cp2ap_perf_req_cpu = <5>; /* CP2AP_DVFSREQ_CPU */
-                               mif,irq_cp2ap_perf_req_mif = <6>; /* CP2AP_DVFSREQ_MIF */
-                               mif,irq_cp2ap_perf_req_int = <7>; /* CP2AP_DVFSREQ_INT */
+                               /* Status bit info for mbx_ap2cp_united_status */
+                               sbi_uart_noti_mask = <0x1>;
+                               sbi_uart_noti_pos = <16>;
+                               sbi_ds_det_mask = <0x3>;
+                               sbi_ds_det_pos = <14>;
+                               sbi_sys_rev_mask = <0xff>;
+                               sbi_sys_rev_pos = <6>;
+                               sbi_pda_active_mask = <0x1>;
+                               sbi_pda_active_pos = <5>;
+                               sbi_ap_status_mask = <0xf>;
+                               sbi_ap_status_pos = <1>;
 
-                               /* mbox pdata for sbi(status bit info) */
+                               /* Status bit info for mbx_cp2ap_united_status */
                                sbi_cp_rat_mode_mask = <0x3f>;
                                sbi_cp_rat_mode_pos = <26>;
                                sbi_cp_evs_mode_mask = <0x1>;
                                sbi_cp_evs_mode_pos = <7>;
-                               sbi_cp_wakelock_mask = <0x1>;
-                               sbi_cp_wakelock_pos = <6>;
-                               sbi_lte_active_mask = <0x1>;
-                               sbi_lte_active_pos = <5>;
                                sbi_wake_lock_mask = <0x1>;
                                sbi_wake_lock_pos = <6>;
+                               sbi_lte_active_mask = <0x1>;
+                               sbi_lte_active_pos = <5>;
                                sbi_cp_status_mask = <0xf>;
                                sbi_cp_status_pos = <1>;
-                               sbi_pda_active_mask = <0x1>;
-                               sbi_pda_active_pos = <5>;
-                               sbi_ap_status_mask = <0xf>;
-                               sbi_ap_status_pos = <1>;
-
-                               sbi_ds_det_mask = <0x3>;
-                               sbi_ds_det_pos = <14>;
-                               sbi_sys_rev_mask = <0xff>;
-                               sbi_sys_rev_pos = <6>;
 
+                               /* Status bit info for mbx_cp2ap_dvfsreq_cpu */
                                sbi_lockval_cp2ap_dvfsreq_endian_mask = <0x1>;
                                sbi_lockval_cp2ap_dvfsreq_endian_pos = <31>;
                                sbi_lockval_cp2ap_dvfsreq_index_mask = <0x7fff>;
                                sbi_lockval_cp2ap_dvfsreq_index_pos = <0>;
 
+                               /* Status bit info for mbx_ap2cp_kerneltime */
                                sbi_ap2cp_kerneltime_sec_mask = <0xfff>;
                                sbi_ap2cp_kerneltime_sec_pos = <20>;
                                sbi_ap2cp_kerneltime_usec_mask = <0xfffff>;