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ARM: dts: imx6sl: add "fsl,imx6q-uart" for uart compatible
authorHuang Shijie <b32955@freescale.com>
Mon, 8 Jul 2013 09:14:19 +0000 (17:14 +0800)
committerShawn Guo <shawn.guo@linaro.org>
Thu, 22 Aug 2013 15:29:06 +0000 (23:29 +0800)
In order to enable the DMA for some uart port in imx6sl, we add the
"fsl,imx6q-uart" to the uart's compatible property.

Signed-off-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
arch/arm/boot/dts/imx6sl.dtsi patch | blob | blame | history

diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index 9138c67d49619fabe3074671d9813d28fc314436..0a297afce002f5d38842200cfddc815eaf4ca2b7 100644 (file)
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -152,7 +152,8 @@
                                };
 
                                uart5: serial@02018000 {
-                                       compatible = "fsl,imx6sl-uart", "fsl,imx21-uart";
+                                       compatible = "fsl,imx6sl-uart",
+                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02018000 0x4000>;
                                        interrupts = <0 30 0x04>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
@@ -162,7 +163,8 @@
                                };
 
                                uart1: serial@02020000 {
-                                       compatible = "fsl,imx6sl-uart", "fsl,imx21-uart";
+                                       compatible = "fsl,imx6sl-uart",
+                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02020000 0x4000>;
                                        interrupts = <0 26 0x04>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
@@ -172,7 +174,8 @@
                                };
 
                                uart2: serial@02024000 {
-                                       compatible = "fsl,imx6sl-uart", "fsl,imx21-uart";
+                                       compatible = "fsl,imx6sl-uart",
+                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02024000 0x4000>;
                                        interrupts = <0 27 0x04>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
@@ -209,7 +212,8 @@
                                };
 
                                uart3: serial@02034000 {
-                                       compatible = "fsl,imx6sl-uart", "fsl,imx21-uart";
+                                       compatible = "fsl,imx6sl-uart",
+                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02034000 0x4000>;
                                        interrupts = <0 28 0x04>;
                                        clocks = <&clks IMX6SL_CLK_UART>,
@@ -219,7 +223,8 @@
                                };
 
                                uart4: serial@02038000 {
-                                       compatible = "fsl,imx6sl-uart", "fsl,imx21-uart";
+                                       compatible = "fsl,imx6sl-uart",
+                                                  "fsl,imx6q-uart", "fsl,imx21-uart";
                                        reg = <0x02038000 0x4000>;
                                        interrupts = <0 29 0x04>;
                                        clocks = <&clks IMX6SL_CLK_UART>,