mtd: m25p80: re-align ID entries

No change in the table data.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Reviewed-by: Sourav Poddar <sourav.poddar@ti.com>

diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 7c4cbad2e981cf0eab6100e18d3985f831a944f4..7e3ec7ae727f58d1e4bf8aa1dbe15978be83fa68 100644 (file)
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -740,19 +740,19 @@ static const struct spi_device_id m25p_ids[] = {
        { "at45db081d", INFO(0x1f2500, 0, 64 * 1024, 16, SECT_4K) },
 
        /* EON -- en25xxx */
-       { "en25f32", INFO(0x1c3116, 0, 64 * 1024,  64, SECT_4K) },
-       { "en25p32", INFO(0x1c2016, 0, 64 * 1024,  64, 0) },
-       { "en25q32b", INFO(0x1c3016, 0, 64 * 1024,  64, 0) },
-       { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) },
-       { "en25q64", INFO(0x1c3017, 0, 64 * 1024, 128, SECT_4K) },
-       { "en25qh256", INFO(0x1c7019, 0, 64 * 1024, 512, 0) },
+       { "en25f32",    INFO(0x1c3116, 0, 64 * 1024,   64, SECT_4K) },
+       { "en25p32",    INFO(0x1c2016, 0, 64 * 1024,   64, 0) },
+       { "en25q32b",   INFO(0x1c3016, 0, 64 * 1024,   64, 0) },
+       { "en25p64",    INFO(0x1c2017, 0, 64 * 1024,  128, 0) },
+       { "en25q64",    INFO(0x1c3017, 0, 64 * 1024,  128, SECT_4K) },
+       { "en25qh256",  INFO(0x1c7019, 0, 64 * 1024,  512, 0) },
 
        /* ESMT */
        { "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64, SECT_4K) },
 
        /* Everspin */
-       { "mr25h256", CAT25_INFO(  32 * 1024, 1, 256, 2, M25P_NO_ERASE | M25P_NO_FR) },
-       { "mr25h10", CAT25_INFO(128 * 1024, 1, 256, 3, M25P_NO_ERASE | M25P_NO_FR) },
+       { "mr25h256", CAT25_INFO( 32 * 1024, 1, 256, 2, M25P_NO_ERASE | M25P_NO_FR) },
+       { "mr25h10",  CAT25_INFO(128 * 1024, 1, 256, 3, M25P_NO_ERASE | M25P_NO_FR) },
 
        /* GigaDevice */
        { "gd25q32", INFO(0xc84016, 0, 64 * 1024,  64, SECT_4K) },
@@ -777,16 +777,16 @@ static const struct spi_device_id m25p_ids[] = {
        { "mx66l51235l", INFO(0xc2201a, 0, 64 * 1024, 1024, 0) },
 
        /* Micron */
-       { "n25q064",  INFO(0x20ba17, 0, 64 * 1024, 128, 0) },
-       { "n25q128a11",  INFO(0x20bb18, 0, 64 * 1024, 256, 0) },
-       { "n25q128a13",  INFO(0x20ba18, 0, 64 * 1024, 256, 0) },
-       { "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K) },
-       { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K) },
+       { "n25q064",     INFO(0x20ba17, 0, 64 * 1024,  128, 0) },
+       { "n25q128a11",  INFO(0x20bb18, 0, 64 * 1024,  256, 0) },
+       { "n25q128a13",  INFO(0x20ba18, 0, 64 * 1024,  256, 0) },
+       { "n25q256a",    INFO(0x20ba19, 0, 64 * 1024,  512, SECT_4K) },
+       { "n25q512a",    INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K) },
 
        /* PMC */
-       { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) },
-       { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SECT_4K_PMC) },
-       { "pm25lq032", INFO(0x7f9d46, 0, 64 * 1024,  64, SECT_4K) },
+       { "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
+       { "pm25lv010",   INFO(0,        0, 32 * 1024,    4, SECT_4K_PMC) },
+       { "pm25lq032",   INFO(0x7f9d46, 0, 64 * 1024,   64, SECT_4K) },
 
        /* Spansion -- single (large) sector size only, at least
         * for the chips listed here (without boot sectors).