ARM: dts: dm816x: Fix NAND device nodes
authorRoger Quadros <rogerq@ti.com>
Tue, 23 Feb 2016 16:37:23 +0000 (18:37 +0200)
committerTony Lindgren <tony@atomide.com>
Fri, 26 Feb 2016 18:32:14 +0000 (10:32 -0800)
Add compatible id, GPMC register resource and interrupt
resource to NAND controller nodes.

The GPMC node will provide an interrupt controller for the
NAND IRQs.

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/boot/dts/dm8168-evm.dts
arch/arm/boot/dts/dm816x.dtsi

index 169a85578fc93e31927c10ce381b9407a484fe38..0cb1003c41bbfca54dc6b40a82ec4928b626bd79 100644 (file)
@@ -6,6 +6,7 @@
 /dts-v1/;
 
 #include "dm816x.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
 
 / {
        model = "DM8168 EVM";
        ranges = <0 0 0x04000000 0x01000000>;   /* CS0: 16MB for NAND */
 
        nand@0,0 {
+               compatible = "ti,omap2-nand";
                linux,mtd-name= "micron,mt29f2g16aadwp";
                reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
+               interrupt-parent = <&gpmc>;
+               interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
+                            <1 IRQ_TYPE_NONE>; /* termcount */
                #address-cells = <1>;
                #size-cells = <1>;
                ti,nand-ecc-opt = "bch8";
index c3b8811a3e587ff36dceff668f5f6a9f38cfe702..30fa5b69c590f6f9dfec900397852b6e6582402e 100644 (file)
                        dma-names = "rxtx";
                        gpmc,num-cs = <6>;
                        gpmc,num-waitpins = <2>;
+                       interrupt-controller;
+                       #interrupt-cells = <2>;
                };
 
                i2c1: i2c@48028000 {