mtd: fsmc_nand: pass the ale and cmd resource via resource
authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Thu, 4 Oct 2012 13:14:16 +0000 (15:14 +0200)
committerArtem Bityutskiy <artem.bityutskiy@linux.intel.com>
Thu, 15 Nov 2012 13:37:47 +0000 (15:37 +0200)
Do not use the platform_data to pass resource and be smart in the drivers.
Just pass it via resource

Switch to devm_request_and_ioremap at the sametime

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-By: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Documentation/devicetree/bindings/mtd/fsmc-nand.txt
arch/arm/boot/dts/spear13xx.dtsi
arch/arm/boot/dts/spear300.dtsi
arch/arm/boot/dts/spear310.dtsi
arch/arm/boot/dts/spear320.dtsi
arch/arm/boot/dts/spear600.dtsi
arch/arm/mach-u300/core.c
drivers/mtd/nand/fsmc_nand.c
include/linux/mtd/fsmc.h

index e2c663b354d2ae2f241e5739d9cf2b6e67b23e37..e3ea32e7de3e763bae2aa515375ee8ea8ccd5efd 100644 (file)
@@ -3,9 +3,7 @@
 Required properties:
 - compatible : "st,spear600-fsmc-nand"
 - reg : Address range of the mtd chip
-- reg-names: Should contain the reg names "fsmc_regs" and "nand_data"
-- st,ale-off : Chip specific offset to ALE
-- st,cle-off : Chip specific offset to CLE
+- reg-names: Should contain the reg names "fsmc_regs", "nand_data", "nand_addr" and "nand_cmd"
 
 Optional properties:
 - bank-width : Width (in bytes) of the device.  If not present, the width
@@ -19,10 +17,10 @@ Example:
                #address-cells = <1>;
                #size-cells = <1>;
                reg = <0xd1800000 0x1000        /* FSMC Register */
-                      0xd2000000 0x4000>;      /* NAND Base */
-               reg-names = "fsmc_regs", "nand_data";
-               st,ale-off = <0x20000>;
-               st,cle-off = <0x10000>;
+                      0xd2000000 0x0010        /* NAND Base DATA */
+                      0xd2020000 0x0010        /* NAND Base ADDR */
+                      0xd2010000 0x0010>;      /* NAND Base CMD */
+               reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
 
                bank-width = <1>;
                nand-skip-bbtscan;
index f7b84aced654ca643bc49ebe83b376425a6b893f..14a6d15c2a81e58220a8f9f142cf07d507909a26 100644 (file)
                        compatible = "st,spear600-fsmc-nand";
                        #address-cells = <1>;
                        #size-cells = <1>;
-                       reg = <0xb0000000 0x1000        /* FSMC Register */
-                              0xb0800000 0x0010>;      /* NAND Base */
-                       reg-names = "fsmc_regs", "nand_data";
+                       reg = <0xb0000000 0x1000        /* FSMC Register*/
+                              0xb0800000 0x0010        /* NAND Base DATA */
+                              0xb0820000 0x0010        /* NAND Base ADDR */
+                              0xb0810000 0x0010>;      /* NAND Base CMD */
+                       reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
                        interrupts = <0 20 0x4
                                      0 21 0x4
                                      0 22 0x4
                                      0 23 0x4>;
-                       st,ale-off = <0x20000>;
-                       st,cle-off = <0x10000>;
                        status = "disabled";
                };
 
index ed3627c116ccbd7c5e8f90208fab4c37ef7a97d0..bc436387d7f9bb9b75c96ce7eaf312ea570ecac8 100644 (file)
                        #address-cells = <1>;
                        #size-cells = <1>;
                        reg = <0x94000000 0x1000        /* FSMC Register */
-                              0x80000000 0x0010>;      /* NAND Base */
-                       reg-names = "fsmc_regs", "nand_data";
-                       st,ale-off = <0x20000>;
-                       st,cle-off = <0x10000>;
+                              0x80000000 0x0010        /* NAND Base DATA */
+                              0x80020000 0x0010        /* NAND Base ADDR */
+                              0x80010000 0x0010>;      /* NAND Base CMD */
+                       reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
                        status = "disabled";
                };
 
index 62fc4fb3e5f92f079cd3caaf0ccdf852e1ff01d1..7840e529aba28c820998391f16c1018534763a97 100644 (file)
                        #address-cells = <1>;
                        #size-cells = <1>;
                        reg = <0x44000000 0x1000        /* FSMC Register */
-                              0x40000000 0x0010>;      /* NAND Base */
-                       reg-names = "fsmc_regs", "nand_data";
-                       st,ale-off = <0x10000>;
-                       st,cle-off = <0x20000>;
+                              0x40000000 0x0010        /* NAND Base DATA */
+                              0x40020000 0x0010        /* NAND Base ADDR */
+                              0x40010000 0x0010>;      /* NAND Base CMD */
+                       reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
                        status = "disabled";
                };
 
index 1f49d69595a06996b0c8b48d631ed116716f7abb..5ad820641ac05b68fb0552134f4a3d7886312bfb 100644 (file)
                        #address-cells = <1>;
                        #size-cells = <1>;
                        reg = <0x4c000000 0x1000        /* FSMC Register */
-                              0x50000000 0x0010>;      /* NAND Base */
-                       reg-names = "fsmc_regs", "nand_data";
-                       st,ale-off = <0x20000>;
-                       st,cle-off = <0x10000>;
+                              0x50000000 0x0010        /* NAND Base DATA */
+                              0x50020000 0x0010        /* NAND Base ADDR */
+                              0x50010000 0x0010>;      /* NAND Base CMD */
+                       reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
                        status = "disabled";
                };
 
index a3c36e47d7efcafee29eb73865eb5dec5651d4a4..4ecc66f5ac88e5282f04cd930b6f3ae25b4a1025 100644 (file)
                        #address-cells = <1>;
                        #size-cells = <1>;
                        reg = <0xd1800000 0x1000        /* FSMC Register */
-                              0xd2000000 0x4000>;      /* NAND Base */
-                       reg-names = "fsmc_regs", "nand_data";
-                       st,ale-off = <0x20000>;
-                       st,cle-off = <0x10000>;
+                              0xd2000000 0x0010        /* NAND Base DATA */
+                              0xd2020000 0x0010        /* NAND Base ADDR */
+                              0xd2010000 0x0010>;      /* NAND Base CMD */
+                       reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd";
                        status = "disabled";
                };
 
index b8efac4daed89256a8e9dc0257c940af05033fa4..f642a1552346bcd624c0c1ee0eac58c7ff2912f2 100644 (file)
@@ -251,6 +251,18 @@ static struct resource rtc_resources[] = {
  * but these are not yet used by the driver.
  */
 static struct resource fsmc_resources[] = {
+       {
+               .name  = "nand_addr",
+               .start = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_ALE,
+               .end   = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_ALE + SZ_16K - 1,
+               .flags = IORESOURCE_MEM,
+       },
+       {
+               .name  = "nand_cmd",
+               .start = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_CLE,
+               .end   = U300_NAND_CS0_PHYS_BASE + PLAT_NAND_CLE + SZ_16K - 1,
+               .flags = IORESOURCE_MEM,
+       },
        {
                .name  = "nand_data",
                .start = U300_NAND_CS0_PHYS_BASE,
@@ -1496,8 +1508,6 @@ static struct fsmc_nand_platform_data nand_platform_data = {
        .nr_partitions = ARRAY_SIZE(u300_partitions),
        .options = NAND_SKIP_BBTSCAN,
        .width = FSMC_NAND_BW8,
-       .ale_off = PLAT_NAND_ALE,
-       .cle_off = PLAT_NAND_CLE,
 };
 
 static struct platform_device nand_device = {
index 38d26240d8b152b06462794ed688905951bf7f4b..cb86450871517143977abfc618d083d13ddcbaee 100644 (file)
@@ -876,8 +876,6 @@ static int __devinit fsmc_nand_probe_config_dt(struct platform_device *pdev,
                        return -EINVAL;
                }
        }
-       of_property_read_u32(np, "st,ale-off", &pdata->ale_off);
-       of_property_read_u32(np, "st,cle-off", &pdata->cle_off);
        if (of_get_property(np, "nand-skip-bbtscan", NULL))
                pdata->options = NAND_SKIP_BBTSCAN;
 
@@ -935,41 +933,28 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
        if (!res)
                return -EINVAL;
 
-       if (!devm_request_mem_region(&pdev->dev, res->start, resource_size(res),
-                               pdev->name)) {
-               dev_err(&pdev->dev, "Failed to get memory data resourse\n");
-               return -ENOENT;
-       }
-
-       host->data_pa = (dma_addr_t)res->start;
-       host->data_va = devm_ioremap(&pdev->dev, res->start,
-                       resource_size(res));
+       host->data_va = devm_request_and_ioremap(&pdev->dev, res);
        if (!host->data_va) {
                dev_err(&pdev->dev, "data ioremap failed\n");
                return -ENOMEM;
        }
+       host->data_pa = (dma_addr_t)res->start;
 
-       if (!devm_request_mem_region(&pdev->dev, res->start + pdata->ale_off,
-                       resource_size(res), pdev->name)) {
-               dev_err(&pdev->dev, "Failed to get memory ale resourse\n");
-               return -ENOENT;
-       }
+       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand_addr");
+       if (!res)
+               return -EINVAL;
 
-       host->addr_va = devm_ioremap(&pdev->dev, res->start + pdata->ale_off,
-                       resource_size(res));
+       host->addr_va = devm_request_and_ioremap(&pdev->dev, res);
        if (!host->addr_va) {
                dev_err(&pdev->dev, "ale ioremap failed\n");
                return -ENOMEM;
        }
 
-       if (!devm_request_mem_region(&pdev->dev, res->start + pdata->cle_off,
-                       resource_size(res), pdev->name)) {
-               dev_err(&pdev->dev, "Failed to get memory cle resourse\n");
-               return -ENOENT;
-       }
+       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand_cmd");
+       if (!res)
+               return -EINVAL;
 
-       host->cmd_va = devm_ioremap(&pdev->dev, res->start + pdata->cle_off,
-                       resource_size(res));
+       host->cmd_va = devm_request_and_ioremap(&pdev->dev, res);
        if (!host->cmd_va) {
                dev_err(&pdev->dev, "ale ioremap failed\n");
                return -ENOMEM;
@@ -979,14 +964,7 @@ static int __init fsmc_nand_probe(struct platform_device *pdev)
        if (!res)
                return -EINVAL;
 
-       if (!devm_request_mem_region(&pdev->dev, res->start, resource_size(res),
-                       pdev->name)) {
-               dev_err(&pdev->dev, "Failed to get memory regs resourse\n");
-               return -ENOENT;
-       }
-
-       host->regs_va = devm_ioremap(&pdev->dev, res->start,
-                       resource_size(res));
+       host->regs_va = devm_request_and_ioremap(&pdev->dev, res);
        if (!host->regs_va) {
                dev_err(&pdev->dev, "regs ioremap failed\n");
                return -ENOMEM;
index b20029221fb1b6e95a1d1a689ba56850d8837f56..d6ed61ef451df403377f77e010a52711dac8e5a9 100644 (file)
@@ -155,9 +155,6 @@ struct fsmc_nand_platform_data {
        unsigned int            width;
        unsigned int            bank;
 
-       /* CLE, ALE offsets */
-       unsigned int            cle_off;
-       unsigned int            ale_off;
        enum access_mode        mode;
 
        void                    (*select_bank)(uint32_t bank, uint32_t busw);