[9610] arm64: dts: enabled 3FA0 video mode

Change-Id: I29124958c117f4e8b1e0d3382f0fbc930f6a7a3c
Signed-off-by: ChiHun Won <chihun.won@samsung.com>

diff --git a/arch/arm64/boot/dts/exynos/exynos9610-display-lcd.dtsi b/arch/arm64/boot/dts/exynos/exynos9610-display-lcd.dtsi
index 0eac91cd93149b39aa6b4c03f6e0d7c506ba9394..df486d36664780eb3c0cf9a953b7db71f664e77b 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos9610-display-lcd.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos9610-display-lcd.dtsi
@@ -189,9 +189,9 @@
                mic_en = <0>;           /* 0: Disable, 1: Enable */
                mic_ratio = <2>;        /* 0: 1/2 mic, 1: 1/3 mic */
                mic_ver = <0>;          /* 0: mic v1.1, 1: v1.2, 2: v2.0 */
-               type_of_ddi = <0>;      /* 0: Samsung Mobile, 1: MAGNA, 2: Normal(Etc) */
-               dsc_en = <0>;           /* 0: Disable, 1: Enable */
-               dsc_cnt = <0>;          /* used DSC count */
+               type_of_ddi = <0>;      /* 0: Samsung Mobile, 1: MAGNA, 2: Normal(Etc) */
+               dsc_en = <0>;           /* 0: Disable, 1: Enable */
+               dsc_cnt = <0>;          /* used DSC count */
                dsc_slice_num = <0>;    /* count of dsc slice */
                dsc_slice_h = <40>;     /* height of dsc slice */
                data_lane = <4>;        /* number of using data lane */
@@ -208,6 +208,40 @@
                hdr_max_luma = <5400000>;               /* 540 */
                hdr_max_avg_luma = <1200000>;   /* 120 */
                hdr_min_luma = <5>;                             /* 0.0005 */
-};
+       };
 
+       s6e3fa0_vid: s6e3fa0_hfd_vid {
+               mode = <0>; /* 0: video mode, 1: DP command mode, 2: MIPI command mode */
+               resolution = <1080 1920>;
+               size = <80 120>;
+               timing,refresh = <60>;
+               timing,h-porch = <20 20 20>;
+               timing,v-porch = <2 20 2>;
+               timing,dsi-hs-clk = <550>;
+               /* TODO : pms value to be set */
+               timing,pmsk = <1 169 3 0>;
+               timing,dsi-escape-clk = <20>;
+               mic_en = <0>;           /* 0: Disable, 1: Enable */
+               mic_ratio = <0>;        /* 0: 1/2 mic, 1: 1/3 mic */
+               mic_ver = <0>;          /* 0: mic v1.1, 1: v1.2, 2: v2.0 */
+               type_of_ddi = <0>;      /* 0: Samsung Mobile, 1: MAGNA, 2: Normal(Etc) */
+               dsc_en = <0>;           /* 0: Disable, 1: Enable */
+               dsc_cnt = <0>;          /* used DSC count */
+               dsc_slice_num = <0>;    /* count of dsc slice */
+               data_lane = <4>;        /* number of using data lane */
+               cmd_underrun_lp_ref = <4942>;   /* for underrun detect at command mode*/
+               vt_compensation = <39>; /* for underrun detect at video mode*/
+               mres_en = <0>;
+               mres_number = <3>;
+               mres_width = <1440 1080 720>;
+               mres_height = <2960 2220 1480>;
+               mres_dsc_width = <720 540 360>;
+               mres_dsc_height = <40 30 74>;
+               mres_dsc_en = <1 1 0>;
+               hdr_num = <1>;          /* max: 4 */
+               hdr_type = <2 0 0 0>;   /* 1: DOLBY_VISION, 2: HDR10, 3: HLG */
+               hdr_max_luma = <5400000>;               /* 540 */
+               hdr_max_avg_luma = <1200000>;   /* 120 */
+               hdr_min_luma = <5>;                             /* 0.0005 */
+       };
 };

diff --git a/arch/arm64/boot/dts/exynos/exynos9610-erd9610.dts b/arch/arm64/boot/dts/exynos/exynos9610-erd9610.dts
index d2012cab908852fe334304d0ae9d25a7b2846390..8c8386122a3a945ac2fac8fa0f8e24227c8f2b2e 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos9610-erd9610.dts
+++ b/arch/arm64/boot/dts/exynos/exynos9610-erd9610.dts
@@ -67,7 +67,7 @@
        };
 
        dsim_0: dsim@0x148E0000 {
-               lcd_info = <&s6e3fa0>;
+               lcd_info = <&s6e3fa0_vid>;
                /* reset */
                gpios = <&gpg1 4 0x1>, <&gpg1 7 0x1>;
        };

diff --git a/arch/arm64/boot/dts/exynos/exynos9610.dtsi b/arch/arm64/boot/dts/exynos/exynos9610.dtsi
index 7afb556b81eb3920dbba4d8b9965b142ac7c3071..2f7c10d4a4af55f99aa5f2e24377e09c89e0b3dd 100644 (file)
--- a/arch/arm64/boot/dts/exynos/exynos9610.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos9610.dtsi
@@ -2459,7 +2459,7 @@
                max_win = <4>;
                default_win = <0>;
                default_idma = <0>;
-               psr_mode = <2>;         /* 0: video mode, 1: DP command mode, 2: MIPI command mode */
+               psr_mode = <0>;         /* 0: video mode, 1: DP command mode, 2: MIPI command mode */
                trig_mode = <0>;        /* 0: hw trigger, 1: sw trigger */
                dsi_mode = <0>;         /* 0: single dsi, 1: dual dsi */
 
@@ -2472,7 +2472,7 @@
                pd_name = "pd-dispaud";
 
                /* pixel per clock */
-               ppc = <1>;
+               ppc = <2>;
 
                #address-cells = <2>;
                #size-cells = <1>;