MIPS: Don't assume 64-bit FP registers for dump_{,task_}fpu

This code assumed that saved FP registers are 64 bits wide, an
assumption which will no longer be true once MSA is introduced. This
patch modifies the code to copy the lower 64 bits of each register in
turn, which is safe for any FP register width >= 64 bits.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6425/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 6ae540e133b2aa592a029a131f541a6619aaaceb..2f01f3d48d756dbf15e5d7561842f33499d4c0b5 100644 (file)
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -157,7 +157,13 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
 /* Fill in the fpu structure for a core dump.. */
 int dump_fpu(struct pt_regs *regs, elf_fpregset_t *r)
 {
-       memcpy(r, &current->thread.fpu, sizeof(current->thread.fpu));
+       int i;
+
+       for (i = 0; i < NUM_FPU_REGS; i++)
+               memcpy(&r[i], &current->thread.fpu.fpr[i], sizeof(*r));
+
+       memcpy(&r[NUM_FPU_REGS], &current->thread.fpu.fcr31,
+              sizeof(current->thread.fpu.fcr31));
 
        return 1;
 }
@@ -192,7 +198,13 @@ int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
 
 int dump_task_fpu(struct task_struct *t, elf_fpregset_t *fpr)
 {
-       memcpy(fpr, &t->thread.fpu, sizeof(current->thread.fpu));
+       int i;
+
+       for (i = 0; i < NUM_FPU_REGS; i++)
+               memcpy(&fpr[i], &t->thread.fpu.fpr[i], sizeof(*fpr));
+
+       memcpy(&fpr[NUM_FPU_REGS], &t->thread.fpu.fcr31,
+              sizeof(t->thread.fpu.fcr31));
 
        return 1;
 }