[SPARC64]: Fix sun4v early bootup.

prom_sun4v_name should be "sun4v" not "SUNW,sun4v"

Also, this is too early to make use of the
.sun4v_Xinsn_patch code patching, so just check
things manually.

This gets us at least to prom_init() on Niagara.

Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S
index f581f0e917f7ee97b553247ccd0c9b584f2eb426..3222c8205b5723bdefc3239c57fe264256325ce6 100644 (file)
--- a/arch/sparc64/kernel/head.S
+++ b/arch/sparc64/kernel/head.S
@@ -123,7 +123,7 @@ prom_map_name:
 prom_unmap_name:
        .asciz  "unmap"
 prom_sun4v_name:
-       .asciz  "SUNW,sun4v"
+       .asciz  "sun4v"
        .align  4
 prom_root_compatible:
        .skip   64
@@ -300,7 +300,7 @@ sparc64_boot_after_remap:
        or      %g1, %lo(prom_root_compatible), %g1
        sethi   %hi(prom_sun4v_name), %g7
        or      %g7, %lo(prom_sun4v_name), %g7
-       mov     10, %g3
+       mov     5, %g3
 1:     ldub    [%g7], %g2
        ldub    [%g1], %g4
        cmp     %g2, %g4
@@ -380,28 +380,33 @@ jump_to_sun4u_init:
         nop
 
 sun4u_init:
+       BRANCH_IF_SUN4V(g1, sun4v_init)
+
        /* Set ctx 0 */
        mov             PRIMARY_CONTEXT, %g7
-
-661:   stxa            %g0, [%g7] ASI_DMMU
-       .section        .sun4v_1insn_patch, "ax"
-       .word           661b
-       stxa            %g0, [%g7] ASI_MMU
-       .previous
-
+       stxa            %g0, [%g7] ASI_DMMU
        membar          #Sync
 
        mov             SECONDARY_CONTEXT, %g7
+       stxa            %g0, [%g7] ASI_DMMU
+       membar  #Sync
 
-661:   stxa            %g0, [%g7] ASI_DMMU
-       .section        .sun4v_1insn_patch, "ax"
-       .word           661b
+       ba,pt           %xcc, sun4u_continue
+        nop
+
+sun4v_init:
+       /* Set ctx 0 */
+       mov             PRIMARY_CONTEXT, %g7
        stxa            %g0, [%g7] ASI_MMU
-       .previous
+       membar          #Sync
 
-       membar  #Sync
+       mov             SECONDARY_CONTEXT, %g7
+       stxa            %g0, [%g7] ASI_MMU
+       membar          #Sync
+       ba,pt           %xcc, niagara_tlb_fixup
+        nop
 
-       BRANCH_IF_SUN4V(g1, niagara_tlb_fixup)
+sun4u_continue:
        BRANCH_IF_ANY_CHEETAH(g1, g7, cheetah_tlb_fixup)
 
        ba,pt   %xcc, spitfire_tlb_fixup