drm/radeon: Make IH ring overflow debugging output more useful

Use the same format for all ring indices, and fix the calculation of the
post-overflow RPTR.

Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 620e8949d9c08327d53014fed11cf17ff9d84696..6f2602b450693ef2376911526116f9c0e5864be7 100644 (file)
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -7756,8 +7756,8 @@ static inline u32 cik_get_ih_wptr(struct radeon_device *rdev)
                 * from the last not overwritten vector (wptr + 16). Hopefully
                 * this should allow us to catchup.
                 */
-               dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n",
-                       wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
+               dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
+                        wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask);
                rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
                tmp = RREG32(IH_RB_CNTL);
                tmp |= IH_WPTR_OVERFLOW_CLEAR;

diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 6a50b038606ed1c18f79201efb7513f2d577b5e6..b0913705c1df97853783e712efffbd08160c23c8 100644 (file)
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -4754,8 +4754,8 @@ static u32 evergreen_get_ih_wptr(struct radeon_device *rdev)
                 * from the last not overwritten vector (wptr + 16). Hopefully
                 * this should allow us to catchup.
                 */
-               dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n",
-                       wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
+               dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
+                        wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask);
                rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
                tmp = RREG32(IH_RB_CNTL);
                tmp |= IH_WPTR_OVERFLOW_CLEAR;

diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 5514f1bb6fe17aa6e2f4b4870f0b286e31598ca2..81f3236de1b4f2ae176a423e5d363d25eaf09e4c 100644 (file)
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -3797,8 +3797,8 @@ static u32 r600_get_ih_wptr(struct radeon_device *rdev)
                 * from the last not overwritten vector (wptr + 16). Hopefully
                 * this should allow us to catchup.
                 */
-               dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n",
-                       wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
+               dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
+                        wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask);
                rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
                tmp = RREG32(IH_RB_CNTL);
                tmp |= IH_WPTR_OVERFLOW_CLEAR;

diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index eacbe8a9ac55a53397ff919aa63b5c4233947320..7baa6c655b95958f33a7810376a6bd6ade39f300 100644 (file)
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -6321,8 +6321,8 @@ static inline u32 si_get_ih_wptr(struct radeon_device *rdev)
                 * from the last not overwritten vector (wptr + 16). Hopefully
                 * this should allow us to catchup.
                 */
-               dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, %d, %d)\n",
-                       wptr, rdev->ih.rptr, (wptr + 16) + rdev->ih.ptr_mask);
+               dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
+                        wptr, rdev->ih.rptr, (wptr + 16) & rdev->ih.ptr_mask);
                rdev->ih.rptr = (wptr + 16) & rdev->ih.ptr_mask;
                tmp = RREG32(IH_RB_CNTL);
                tmp |= IH_WPTR_OVERFLOW_CLEAR;