net: dsa: mv88e6xxx: prefix Port Jamming macros

For implicit namespacing and clarity, prefix the common Port Jamming
Control Register macros with MV88E6XXX_PORT_JAM_CTL and the ones which
differ between implementations with a chosen reference model
(e.g. MV88E6097_PORT_JAM_CTL.)

The 88E6390 family renamed the register to Flow Control and turned it
into an indirect table. Document that as well.

Document the register and prefer ordered hex masks values for all
Marvell 16-bit registers.

Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/drivers/net/dsa/mv88e6xxx/port.c b/drivers/net/dsa/mv88e6xxx/port.c
index 60c31b6c2f47eab1624d299c99c34d904d3f03d4..615b8843ad8e5cf243d9a213929ec442a3099bba 100644 (file)
--- a/drivers/net/dsa/mv88e6xxx/port.c
+++ b/drivers/net/dsa/mv88e6xxx/port.c
@@ -376,7 +376,7 @@ int mv88e6xxx_port_get_cmode(struct mv88e6xxx_chip *chip, int port, u8 *cmode)
        return 0;
 }
 
-/* Offset 0x02: Pause Control
+/* Offset 0x02: Jamming Control
  *
  * Do not limit the period of time that this port can be paused for by
  * the remote end or the period of time that this port can pause the
@@ -385,7 +385,8 @@ int mv88e6xxx_port_get_cmode(struct mv88e6xxx_chip *chip, int port, u8 *cmode)
 int mv88e6097_port_pause_limit(struct mv88e6xxx_chip *chip, int port, u8 in,
                               u8 out)
 {
-       return mv88e6xxx_port_write(chip, port, PORT_PAUSE_CTRL, out << 8 | in);
+       return mv88e6xxx_port_write(chip, port, MV88E6097_PORT_JAM_CTL,
+                                   out << 8 | in);
 }
 
 int mv88e6390_port_pause_limit(struct mv88e6xxx_chip *chip, int port, u8 in,
@@ -393,13 +394,15 @@ int mv88e6390_port_pause_limit(struct mv88e6xxx_chip *chip, int port, u8 in,
 {
        int err;
 
-       err = mv88e6xxx_port_write(chip, port, PORT_PAUSE_CTRL,
-                                  PORT_FLOW_CTRL_LIMIT_IN | in);
+       err = mv88e6xxx_port_write(chip, port, MV88E6390_PORT_FLOW_CTL,
+                                  MV88E6390_PORT_FLOW_CTL_UPDATE |
+                                  MV88E6390_PORT_FLOW_CTL_LIMIT_IN | in);
        if (err)
                return err;
 
-       return mv88e6xxx_port_write(chip, port, PORT_PAUSE_CTRL,
-                                   PORT_FLOW_CTRL_LIMIT_OUT | out);
+       return mv88e6xxx_port_write(chip, port, MV88E6390_PORT_FLOW_CTL,
+                                   MV88E6390_PORT_FLOW_CTL_UPDATE |
+                                   MV88E6390_PORT_FLOW_CTL_LIMIT_OUT | out);
 }
 
 /* Offset 0x04: Port Control Register */

diff --git a/drivers/net/dsa/mv88e6xxx/port.h b/drivers/net/dsa/mv88e6xxx/port.h
index 260096b34d2b8a79ffbe55a255e00ee4ad9f09bb..5226a0651d8ef50061fe466eeb3bdd1a629d8024 100644 (file)
--- a/drivers/net/dsa/mv88e6xxx/port.h
+++ b/drivers/net/dsa/mv88e6xxx/port.h
@@ -63,9 +63,19 @@
 #define MV88E6390_PORT_MAC_CTL_SPEED_10000             0x0003
 #define MV88E6XXX_PORT_MAC_CTL_SPEED_UNFORCED          0x0003
 
-#define PORT_PAUSE_CTRL                0x02
-#define PORT_FLOW_CTRL_LIMIT_IN                ((0x00 << 8) | BIT(15))
-#define PORT_FLOW_CTRL_LIMIT_OUT       ((0x01 << 8) | BIT(15))
+/* Offset 0x02: Jamming Control Register */
+#define MV88E6097_PORT_JAM_CTL                 0x02
+#define MV88E6097_PORT_JAM_CTL_LIMIT_OUT_MASK  0xff00
+#define MV88E6097_PORT_JAM_CTL_LIMIT_IN_MASK   0x00ff
+
+/* Offset 0x02: Flow Control Register */
+#define MV88E6390_PORT_FLOW_CTL                        0x02
+#define MV88E6390_PORT_FLOW_CTL_UPDATE         0x8000
+#define MV88E6390_PORT_FLOW_CTL_PTR_MASK       0x7f00
+#define MV88E6390_PORT_FLOW_CTL_LIMIT_IN       0x0000
+#define MV88E6390_PORT_FLOW_CTL_LIMIT_OUT      0x0100
+#define MV88E6390_PORT_FLOW_CTL_DATA_MASK      0x00ff
+
 #define PORT_SWITCH_ID         0x03
 #define PORT_SWITCH_ID_PROD_NUM_6085   0x04a
 #define PORT_SWITCH_ID_PROD_NUM_6095   0x095