dmaengine: at_hdmac/trivial: rearrange CFG register bits assignment
authorNicolas Ferre <nicolas.ferre@atmel.com>
Fri, 10 May 2013 13:19:15 +0000 (15:19 +0200)
committerVinod Koul <vinod.koul@intel.com>
Fri, 5 Jul 2013 06:10:29 +0000 (11:40 +0530)
No modification in CFG register configuration, just rearrange
bits directives to group logically and make it more readable.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
drivers/dma/at_hdmac.c

index 78c3fb4b4e4053a9000d925d546b898b0bce9784..9e1ad73a78cf2acd21ec22411217c2c1ce57defc 100644 (file)
@@ -1228,11 +1228,10 @@ static struct dma_chan *at_dma_xlate(struct of_phandle_args *dma_spec,
         * ignored depending on DMA transfer direction.
         */
        per_id = dma_spec->args[1];
-       atslave->cfg = ATC_FIFOCFG_HALFFIFO | ATC_DST_H2SEL_HW
-                     | ATC_SRC_H2SEL_HW | ATC_DST_PER(per_id)
-                     | ATC_DST_PER_MSB(per_id)
-                     | ATC_SRC_PER_MSB(per_id)
-                     | ATC_SRC_PER(per_id);
+       atslave->cfg = ATC_FIFOCFG_HALFFIFO
+                    | ATC_DST_H2SEL_HW | ATC_SRC_H2SEL_HW
+                    | ATC_DST_PER_MSB(per_id) | ATC_DST_PER(per_id)
+                    | ATC_SRC_PER_MSB(per_id) | ATC_SRC_PER(per_id);
        atslave->dma_dev = &dmac_pdev->dev;
 
        chan = dma_request_channel(mask, at_dma_filter, atslave);