clk: tegra: Various whitespace cleanups
authorThierry Reding <treding@nvidia.com>
Fri, 1 Aug 2014 08:44:20 +0000 (10:44 +0200)
committerThierry Reding <treding@nvidia.com>
Fri, 10 Apr 2015 14:03:48 +0000 (16:03 +0200)
Make usage of blank lines as separators more consistent.

Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/clk/tegra/clk-pll.c
drivers/clk/tegra/clk-tegra114.c

index bfef9abdf23250d39504587f7f41d3ca6ec6e06a..f9950dda102ece4a003f68cff936581a3d3feecb 100644 (file)
@@ -1223,6 +1223,7 @@ static long _pllre_calc_rate(struct tegra_clk_pll *pll,
 
        return output_rate;
 }
+
 static int clk_pllre_set_rate(struct clk_hw *hw, unsigned long rate,
                                unsigned long parent_rate)
 {
index d0766423a5d607554ff8f9e9f9b7f610f5d875a3..75d8af6213e74e9db8916da5f71c333274a39cd8 100644 (file)
@@ -1263,6 +1263,7 @@ static void tegra114_wait_cpu_in_reset(u32 cpu)
                cpu_relax();
        } while (!(reg & (1 << cpu)));  /* check CPU been reset or not */
 }
+
 static void tegra114_disable_cpu_clock(u32 cpu)
 {
        /* flow controller would take care in the power sequence. */
@@ -1351,7 +1352,6 @@ static void __init tegra114_clock_apply_init_table(void)
        tegra_init_from_table(init_table, clks, TEGRA114_CLK_CLK_MAX);
 }
 
-
 /**
  * tegra114_car_barrier - wait for pending writes to the CAR to complete
  *