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[POWERPC] mpc8568mds.dts: fix PCIe I/O address space location and size
authorAnton Vorontsov <avorontsov@ru.mvista.com>
Tue, 2 Oct 2007 13:48:07 +0000 (17:48 +0400)
committerKumar Gala <galak@kernel.crashing.org>
Thu, 4 Oct 2007 20:47:28 +0000 (15:47 -0500)
According to u-boot/board/mpc8568mds/init.S:

LAW(Local Access Window) configuration:
2)   0xa000_0000   0xbfff_ffff     PCIe MEM                512MB
4)   0xe280_0000   0xe2ff_ffff     PCIe I/O                8M

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
arch/powerpc/boot/dts/mpc8568mds.dts patch | blob | blame | history

diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index 76d23ee643d026a4013a3ae98bb507007256d94c..6923e42af4fd23d082bd89ea629aff3b21c49069 100644 (file)
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -226,8 +226,8 @@
                        interrupt-parent = <&mpic>;
                        interrupts = <1a 2>;
                        bus-range = <0 ff>;
-                       ranges = <02000000 0 a0000000 a0000000 0 20000000
-                                 01000000 0 00000000 e3000000 0 08000000>;
+                       ranges = <02000000 0 a0000000 a0000000 0 10000000
+                                 01000000 0 00000000 e2800000 0 00800000>;
                        clock-frequency = <1fca055>;
                        #interrupt-cells = <1>;
                        #size-cells = <2>;