serial/8250: Add LPC3220 standard UART type
authorRoland Stigge <stigge@antcom.de>
Mon, 11 Jun 2012 19:57:13 +0000 (21:57 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 26 Jul 2012 20:37:02 +0000 (13:37 -0700)
LPC32xx has "Standard" UARTs that are actually 16550A compatible but have
bigger FIFOs. Since the already supported 16X50 line still doesn't match here,
we agreed on adding a new type.

Signed-off-by: Roland Stigge <stigge@antcom.de>
Acked-by: Alan Cox <alan@linux.intel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/tty/serial/8250/8250.c
include/linux/serial_core.h

index 6e1958a325bd8b5512675dd52d399b32bf04803e..8123f784bcdacf3bf653fc7c2c1c57ba0540609f 100644 (file)
@@ -282,6 +282,14 @@ static const struct serial8250_config uart_config[] = {
                .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
                .flags          = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR,
        },
+       [PORT_LPC3220] = {
+               .name           = "LPC3220",
+               .fifo_size      = 64,
+               .tx_loadsz      = 32,
+               .fcr            = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
+                                 UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
+               .flags          = UART_CAP_FIFO,
+       },
 };
 
 /* Uart divisor latch read */
index 65db9928e15f00308e4f1c4383f2b53e0a3ff760..0253c2022e53ebef9950a428b559f8a598167c7a 100644 (file)
@@ -47,7 +47,8 @@
 #define PORT_U6_16550A 19      /* ST-Ericsson U6xxx internal UART */
 #define PORT_TEGRA     20      /* NVIDIA Tegra internal UART */
 #define PORT_XR17D15X  21      /* Exar XR17D15x UART */
-#define PORT_MAX_8250  21      /* max port ID */
+#define PORT_LPC3220   22      /* NXP LPC32xx SoC "Standard" UART */
+#define PORT_MAX_8250  22      /* max port ID */
 
 /*
  * ARM specific type numbers.  These are not currently guaranteed