drm/radeon/dpm: drop clk/voltage dependency filters for CI
authorAlex Deucher <alexander.deucher@amd.com>
Tue, 23 Sep 2014 13:40:24 +0000 (09:40 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Wed, 1 Oct 2014 13:00:06 +0000 (09:00 -0400)
Not sure this was ever necessary for CI, was just done
to be on the safe side.

bug:
https://bugs.freedesktop.org/show_bug.cgi?id=69721

Reviewed-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/radeon/ci_dpm.c

index d416bb2ff48dae0376b15e4789652799ff0638c3..d199be32d5dc5134c6b3ec834b1af5f30d6b8adc 100644 (file)
@@ -162,8 +162,6 @@ static const struct ci_pt_config_reg didt_config_ci[] =
 };
 
 extern u8 rv770_get_memory_module_index(struct radeon_device *rdev);
-extern void btc_get_max_clock_from_voltage_dependency_table(struct radeon_clock_voltage_dependency_table *table,
-                                                           u32 *max_clock);
 extern int ni_copy_and_switch_arb_sets(struct radeon_device *rdev,
                                       u32 arb_freq_src, u32 arb_freq_dest);
 extern u8 si_get_ddr3_mclk_frequency_ratio(u32 memory_clock);
@@ -748,7 +746,6 @@ static void ci_apply_state_adjust_rules(struct radeon_device *rdev,
        struct radeon_clock_and_voltage_limits *max_limits;
        bool disable_mclk_switching;
        u32 sclk, mclk;
-       u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc;
        int i;
 
        if (rps->vce_active) {
@@ -784,29 +781,6 @@ static void ci_apply_state_adjust_rules(struct radeon_device *rdev,
                }
        }
 
-       /* limit clocks to max supported clocks based on voltage dependency tables */
-       btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_sclk,
-                                                       &max_sclk_vddc);
-       btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddci_dependency_on_mclk,
-                                                       &max_mclk_vddci);
-       btc_get_max_clock_from_voltage_dependency_table(&rdev->pm.dpm.dyn_state.vddc_dependency_on_mclk,
-                                                       &max_mclk_vddc);
-
-       for (i = 0; i < ps->performance_level_count; i++) {
-               if (max_sclk_vddc) {
-                       if (ps->performance_levels[i].sclk > max_sclk_vddc)
-                               ps->performance_levels[i].sclk = max_sclk_vddc;
-               }
-               if (max_mclk_vddci) {
-                       if (ps->performance_levels[i].mclk > max_mclk_vddci)
-                               ps->performance_levels[i].mclk = max_mclk_vddci;
-               }
-               if (max_mclk_vddc) {
-                       if (ps->performance_levels[i].mclk > max_mclk_vddc)
-                               ps->performance_levels[i].mclk = max_mclk_vddc;
-               }
-       }
-
        /* XXX validate the min clocks required for display */
 
        if (disable_mclk_switching) {