OMAP2PLUS: DSS2: Generalize naming of PRCM related clock enums in DSS driver

enum dss_clock structure is replaced with generic names that
could be used across OMAP2420, 2430, 3xxx, 44xx platforms.

Signed-off-by: Sumit Semwal <sumit.semwal@ti.com>
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>

diff --git a/drivers/video/omap2/dss/core.c b/drivers/video/omap2/dss/core.c
index 3f7a5fcd1142c3f1c6264edbfad1946c4365a68d..f56ee64f5b583b68354c4933b41cc09c7d88d927 100644 (file)
--- a/drivers/video/omap2/dss/core.c
+++ b/drivers/video/omap2/dss/core.c
@@ -184,7 +184,7 @@ static int omap_dss_probe(struct platform_device *pdev)
        }
 
        /* keep clocks enabled to prevent context saves/restores during init */
-       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
 
        r = rfbi_init_platform_driver();
        if (r) {
@@ -251,7 +251,7 @@ static int omap_dss_probe(struct platform_device *pdev)
                        pdata->default_device = dssdev;
        }
 
-       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 
        return 0;
 

diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 96e37f8e75dcd5d18e3a5de6e83849c3093a8542..dc4518c4b0e4c281fa622204cc3d51411a61fa2b 100644 (file)
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -551,9 +551,9 @@ void dispc_restore_context(void)
 static inline void enable_clocks(bool enable)
 {
        if (enable)
-               dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+               dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
        else
-               dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+               dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 }
 
 bool dispc_go_busy(enum omap_channel channel)
@@ -2311,7 +2311,7 @@ unsigned long dispc_fclk_rate(void)
        unsigned long r = 0;
 
        if (dss_get_dispc_clk_source() == DSS_SRC_DSS1_ALWON_FCLK)
-               r = dss_clk_get_rate(DSS_CLK_FCK1);
+               r = dss_clk_get_rate(DSS_CLK_FCK);
        else
 #ifdef CONFIG_OMAP2_DSS_DSI
                r = dsi_get_dsi1_pll_rate();
@@ -2439,7 +2439,7 @@ void dispc_dump_regs(struct seq_file *s)
 {
 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dispc_read_reg(r))
 
-       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
 
        DUMPREG(DISPC_REVISION);
        DUMPREG(DISPC_SYSCONFIG);
@@ -2596,7 +2596,7 @@ void dispc_dump_regs(struct seq_file *s)
        DUMPREG(DISPC_VID_PRELOAD(0));
        DUMPREG(DISPC_VID_PRELOAD(1));
 
-       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 #undef DUMPREG
 }
 

diff --git a/drivers/video/omap2/dss/dpi.c b/drivers/video/omap2/dss/dpi.c
index 75fb0a5154304a92bbe5b0164a1257064436d2ec..746f1b6dd89700f8c762b40eed8c11b8a010e35e 100644 (file)
--- a/drivers/video/omap2/dss/dpi.c
+++ b/drivers/video/omap2/dss/dpi.c
@@ -107,7 +107,7 @@ static int dpi_set_mode(struct omap_dss_device *dssdev)
        bool is_tft;
        int r = 0;
 
-       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
 
        dispc_set_pol_freq(dssdev->manager->id, dssdev->panel.config,
                        dssdev->panel.acbi, dssdev->panel.acb);
@@ -137,7 +137,7 @@ static int dpi_set_mode(struct omap_dss_device *dssdev)
        dispc_set_lcd_timings(dssdev->manager->id, t);
 
 err0:
-       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
        return r;
 }
 
@@ -173,14 +173,14 @@ int omapdss_dpi_display_enable(struct omap_dss_device *dssdev)
                        goto err1;
        }
 
-       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
 
        r = dpi_basic_init(dssdev);
        if (r)
                goto err2;
 
 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
-       dss_clk_enable(DSS_CLK_FCK2);
+       dss_clk_enable(DSS_CLK_SYSCK);
        r = dsi_pll_init(dssdev, 0, 1);
        if (r)
                goto err3;
@@ -199,10 +199,10 @@ err4:
 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
        dsi_pll_uninit();
 err3:
-       dss_clk_disable(DSS_CLK_FCK2);
+       dss_clk_disable(DSS_CLK_SYSCK);
 #endif
 err2:
-       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
        if (cpu_is_omap34xx())
                regulator_disable(dpi.vdds_dsi_reg);
 err1:
@@ -219,10 +219,10 @@ void omapdss_dpi_display_disable(struct omap_dss_device *dssdev)
 #ifdef CONFIG_OMAP2_DSS_USE_DSI_PLL
        dss_select_dispc_clk_source(DSS_SRC_DSS1_ALWON_FCLK);
        dsi_pll_uninit();
-       dss_clk_disable(DSS_CLK_FCK2);
+       dss_clk_disable(DSS_CLK_SYSCK);
 #endif
 
-       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 
        if (cpu_is_omap34xx())
                regulator_disable(dpi.vdds_dsi_reg);

diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index c42acae10af015eef52dc005bcf72c4607a1376e..c7b5382e1a6b5281811cdaef6cf8655d41cdab3f 100644 (file)
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -654,18 +654,18 @@ static void dsi_vc_disable_bta_irq(int channel)
 static inline void enable_clocks(bool enable)
 {
        if (enable)
-               dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+               dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
        else
-               dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+               dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 }
 
 /* source clock for DSI PLL. this could also be PCLKFREE */
 static inline void dsi_enable_pll_clock(bool enable)
 {
        if (enable)
-               dss_clk_enable(DSS_CLK_FCK2);
+               dss_clk_enable(DSS_CLK_SYSCK);
        else
-               dss_clk_disable(DSS_CLK_FCK2);
+               dss_clk_disable(DSS_CLK_SYSCK);
 
        if (enable && dsi.pll_locked) {
                if (wait_for_bit_change(DSI_PLL_STATUS, 1, 1) != 1)
@@ -741,7 +741,7 @@ static unsigned long dsi_fclk_rate(void)
 
        if (dss_get_dsi_clk_source() == DSS_SRC_DSS1_ALWON_FCLK) {
                /* DSI FCLK source is DSS1_ALWON_FCK, which is dss1_fck */
-               r = dss_clk_get_rate(DSS_CLK_FCK1);
+               r = dss_clk_get_rate(DSS_CLK_FCK);
        } else {
                /* DSI FCLK source is DSI2_PLL_FCLK */
                r = dsi_get_dsi2_pll_rate();
@@ -821,7 +821,7 @@ static int dsi_calc_clock_rates(struct omap_dss_device *dssdev,
                return -EINVAL;
 
        if (cinfo->use_dss2_fck) {
-               cinfo->clkin = dss_clk_get_rate(DSS_CLK_FCK2);
+               cinfo->clkin = dss_clk_get_rate(DSS_CLK_SYSCK);
                /* XXX it is unclear if highfreq should be used
                 * with DSS2_FCK source also */
                cinfo->highfreq = 0;
@@ -867,7 +867,7 @@ int dsi_pll_calc_clock_div_pck(bool is_tft, unsigned long req_pck,
        int match = 0;
        unsigned long dss_clk_fck2;
 
-       dss_clk_fck2 = dss_clk_get_rate(DSS_CLK_FCK2);
+       dss_clk_fck2 = dss_clk_get_rate(DSS_CLK_SYSCK);
 
        if (req_pck == dsi.cache_req_pck &&
                        dsi.cache_cinfo.clkin == dss_clk_fck2) {
@@ -1319,7 +1319,7 @@ void dsi_dump_regs(struct seq_file *s)
 {
 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(r))
 
-       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
 
        DUMPREG(DSI_REVISION);
        DUMPREG(DSI_SYSCONFIG);
@@ -1391,7 +1391,7 @@ void dsi_dump_regs(struct seq_file *s)
        DUMPREG(DSI_PLL_CONFIGURATION1);
        DUMPREG(DSI_PLL_CONFIGURATION2);
 
-       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 #undef DUMPREG
 }
 

diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index 56d37bfefd4d894c923585ee68bcd4ea6e3f48b4..0372befbb692a82ad130dcb7f234ce8548e26e8d 100644 (file)
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -227,7 +227,7 @@ void dss_dump_clocks(struct seq_file *s)
        unsigned long dpll4_ck_rate;
        unsigned long dpll4_m4_ck_rate;
 
-       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
 
        dpll4_ck_rate = clk_get_rate(clk_get_parent(dss.dpll4_m4_ck));
        dpll4_m4_ck_rate = clk_get_rate(dss.dpll4_m4_ck);
@@ -240,21 +240,21 @@ void dss_dump_clocks(struct seq_file *s)
                seq_printf(s, "dss1_alwon_fclk = %lu / %lu  = %lu\n",
                        dpll4_ck_rate,
                        dpll4_ck_rate / dpll4_m4_ck_rate,
-                       dss_clk_get_rate(DSS_CLK_FCK1));
+                       dss_clk_get_rate(DSS_CLK_FCK));
        else
                seq_printf(s, "dss1_alwon_fclk = %lu / %lu * 2 = %lu\n",
                        dpll4_ck_rate,
                        dpll4_ck_rate / dpll4_m4_ck_rate,
-                       dss_clk_get_rate(DSS_CLK_FCK1));
+                       dss_clk_get_rate(DSS_CLK_FCK));
 
-       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 }
 
 void dss_dump_regs(struct seq_file *s)
 {
 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dss_read_reg(r))
 
-       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
 
        DUMPREG(DSS_REVISION);
        DUMPREG(DSS_SYSCONFIG);
@@ -265,7 +265,7 @@ void dss_dump_regs(struct seq_file *s)
        DUMPREG(DSS_PLL_CONTROL);
        DUMPREG(DSS_SDI_STATUS);
 
-       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 #undef DUMPREG
 }
 
@@ -350,7 +350,7 @@ int dss_set_clock_div(struct dss_clock_info *cinfo)
 
 int dss_get_clock_div(struct dss_clock_info *cinfo)
 {
-       cinfo->fck = dss_clk_get_rate(DSS_CLK_FCK1);
+       cinfo->fck = dss_clk_get_rate(DSS_CLK_FCK);
 
        if (cpu_is_omap34xx()) {
                unsigned long prate;
@@ -391,7 +391,7 @@ int dss_calc_clock_div(bool is_tft, unsigned long req_pck,
 
        prate = dss_get_dpll4_rate();
 
-       fck = dss_clk_get_rate(DSS_CLK_FCK1);
+       fck = dss_clk_get_rate(DSS_CLK_FCK);
        if (req_pck == dss.cache_req_pck &&
                        ((cpu_is_omap34xx() && prate == dss.cache_prate) ||
                         dss.cache_dss_cinfo.fck == fck)) {
@@ -418,7 +418,7 @@ retry:
        if (cpu_is_omap24xx()) {
                struct dispc_clock_info cur_dispc;
                /* XXX can we change the clock on omap2? */
-               fck = dss_clk_get_rate(DSS_CLK_FCK1);
+               fck = dss_clk_get_rate(DSS_CLK_FCK);
                fck_div = 1;
 
                dispc_find_clk_divs(is_tft, req_pck, fck, &cur_dispc);
@@ -701,7 +701,7 @@ static void save_all_ctx(void)
 {
        DSSDBG("save context\n");
 
-       dss_clk_enable_no_ctx(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_enable_no_ctx(DSS_CLK_ICK | DSS_CLK_FCK);
 
        dss_save_context();
        dispc_save_context();
@@ -709,7 +709,7 @@ static void save_all_ctx(void)
        dsi_save_context();
 #endif
 
-       dss_clk_disable_no_ctx(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_disable_no_ctx(DSS_CLK_ICK | DSS_CLK_FCK);
 }
 
 static void restore_all_ctx(void)
@@ -807,13 +807,13 @@ unsigned long dss_clk_get_rate(enum dss_clock clk)
        switch (clk) {
        case DSS_CLK_ICK:
                return clk_get_rate(dss.dss_ick);
-       case DSS_CLK_FCK1:
+       case DSS_CLK_FCK:
                return clk_get_rate(dss.dss1_fck);
-       case DSS_CLK_FCK2:
+       case DSS_CLK_SYSCK:
                return clk_get_rate(dss.dss2_fck);
-       case DSS_CLK_54M:
+       case DSS_CLK_TVFCK:
                return clk_get_rate(dss.dss_54m_fck);
-       case DSS_CLK_96M:
+       case DSS_CLK_VIDFCK:
                return clk_get_rate(dss.dss_96m_fck);
        }
 
@@ -827,13 +827,13 @@ static unsigned count_clk_bits(enum dss_clock clks)
 
        if (clks & DSS_CLK_ICK)
                ++num_clks;
-       if (clks & DSS_CLK_FCK1)
+       if (clks & DSS_CLK_FCK)
                ++num_clks;
-       if (clks & DSS_CLK_FCK2)
+       if (clks & DSS_CLK_SYSCK)
                ++num_clks;
-       if (clks & DSS_CLK_54M)
+       if (clks & DSS_CLK_TVFCK)
                ++num_clks;
-       if (clks & DSS_CLK_96M)
+       if (clks & DSS_CLK_VIDFCK)
                ++num_clks;
 
        return num_clks;
@@ -845,13 +845,13 @@ static void dss_clk_enable_no_ctx(enum dss_clock clks)
 
        if (clks & DSS_CLK_ICK)
                clk_enable(dss.dss_ick);
-       if (clks & DSS_CLK_FCK1)
+       if (clks & DSS_CLK_FCK)
                clk_enable(dss.dss1_fck);
-       if (clks & DSS_CLK_FCK2)
+       if (clks & DSS_CLK_SYSCK)
                clk_enable(dss.dss2_fck);
-       if (clks & DSS_CLK_54M)
+       if (clks & DSS_CLK_TVFCK)
                clk_enable(dss.dss_54m_fck);
-       if (clks & DSS_CLK_96M)
+       if (clks & DSS_CLK_VIDFCK)
                clk_enable(dss.dss_96m_fck);
 
        dss.num_clks_enabled += num_clks;
@@ -873,13 +873,13 @@ static void dss_clk_disable_no_ctx(enum dss_clock clks)
 
        if (clks & DSS_CLK_ICK)
                clk_disable(dss.dss_ick);
-       if (clks & DSS_CLK_FCK1)
+       if (clks & DSS_CLK_FCK)
                clk_disable(dss.dss1_fck);
-       if (clks & DSS_CLK_FCK2)
+       if (clks & DSS_CLK_SYSCK)
                clk_disable(dss.dss2_fck);
-       if (clks & DSS_CLK_54M)
+       if (clks & DSS_CLK_TVFCK)
                clk_disable(dss.dss_54m_fck);
-       if (clks & DSS_CLK_96M)
+       if (clks & DSS_CLK_VIDFCK)
                clk_disable(dss.dss_96m_fck);
 
        dss.num_clks_enabled -= num_clks;
@@ -903,9 +903,9 @@ static void dss_clk_enable_all_no_ctx(void)
 {
        enum dss_clock clks;
 
-       clks = DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_FCK2 | DSS_CLK_54M;
+       clks = DSS_CLK_ICK | DSS_CLK_FCK | DSS_CLK_SYSCK | DSS_CLK_TVFCK;
        if (cpu_is_omap34xx())
-               clks |= DSS_CLK_96M;
+               clks |= DSS_CLK_VIDFCK;
        dss_clk_enable_no_ctx(clks);
 }
 
@@ -913,9 +913,9 @@ static void dss_clk_disable_all_no_ctx(void)
 {
        enum dss_clock clks;
 
-       clks = DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_FCK2 | DSS_CLK_54M;
+       clks = DSS_CLK_ICK | DSS_CLK_FCK | DSS_CLK_SYSCK | DSS_CLK_TVFCK;
        if (cpu_is_omap34xx())
-               clks |= DSS_CLK_96M;
+               clks |= DSS_CLK_VIDFCK;
        dss_clk_disable_no_ctx(clks);
 }
 

diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index 981d247c30f27f4f30d2aafbf6602e78fa8da943..4b02e079f20e1aa0ff6d386232cfb9b20f71560f 100644 (file)
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -112,11 +112,11 @@ enum omap_parallel_interface_mode {
 };
 
 enum dss_clock {
-       DSS_CLK_ICK     = 1 << 0,
-       DSS_CLK_FCK1    = 1 << 1,
-       DSS_CLK_FCK2    = 1 << 2,
-       DSS_CLK_54M     = 1 << 3,
-       DSS_CLK_96M     = 1 << 4,
+       DSS_CLK_ICK     = 1 << 0,       /* DSS_L3_ICLK and DSS_L4_ICLK */
+       DSS_CLK_FCK     = 1 << 1,       /* DSS1_ALWON_FCLK */
+       DSS_CLK_SYSCK   = 1 << 2,       /* DSS2_ALWON_FCLK */
+       DSS_CLK_TVFCK   = 1 << 3,       /* DSS_TV_FCLK */
+       DSS_CLK_VIDFCK  = 1 << 4,       /* DSS_96M_FCLK*/
 };
 
 enum dss_clk_source {

diff --git a/drivers/video/omap2/dss/manager.c b/drivers/video/omap2/dss/manager.c
index 172d4e69730917e3a2a4630c8bdcaf4d24c60e92..1f53bf20b6cb249ebeb1e24f9438c7456e9101ee 100644 (file)
--- a/drivers/video/omap2/dss/manager.c
+++ b/drivers/video/omap2/dss/manager.c
@@ -1394,7 +1394,7 @@ static int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
        }
 
        r = 0;
-       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
        if (!dss_cache.irq_enabled) {
                u32 mask;
 
@@ -1407,7 +1407,7 @@ static int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
                dss_cache.irq_enabled = true;
        }
        configure_dispc();
-       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 
        spin_unlock_irqrestore(&dss_cache.lock, flags);
 

diff --git a/drivers/video/omap2/dss/overlay.c b/drivers/video/omap2/dss/overlay.c
index 456efef03c20c6de3a30bcd6aa1355862c4e6c05..996e9a4f6771e9109d9320cef082116146abb5bb 100644 (file)
--- a/drivers/video/omap2/dss/overlay.c
+++ b/drivers/video/omap2/dss/overlay.c
@@ -490,7 +490,7 @@ static int omap_dss_set_manager(struct omap_overlay *ovl,
 
        ovl->manager = mgr;
 
-       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
        /* XXX: on manual update display, in auto update mode, a bug happens
         * here. When an overlay is first enabled on LCD, then it's disabled,
         * and the manager is changed to TV, we sometimes get SYNC_LOST_DIGIT
@@ -499,7 +499,7 @@ static int omap_dss_set_manager(struct omap_overlay *ovl,
         * but I don't understand how or why. */
        msleep(40);
        dispc_set_channel_out(ovl->id, mgr->id);
-       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 
        return 0;
 }

diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c
index 6dbb95d557f8b19ba6dd039dfa508498eef2378b..5ea17f49c6110c3d3703c89b34e5f52e366f67ce 100644 (file)
--- a/drivers/video/omap2/dss/rfbi.c
+++ b/drivers/video/omap2/dss/rfbi.c
@@ -141,9 +141,9 @@ static inline u32 rfbi_read_reg(const struct rfbi_reg idx)
 static void rfbi_enable_clocks(bool enable)
 {
        if (enable)
-               dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+               dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
        else
-               dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+               dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 }
 
 void omap_rfbi_write_command(const void *buf, u32 len)
@@ -496,7 +496,7 @@ unsigned long rfbi_get_max_tx_rate(void)
        };
 
        l4_rate = rfbi.l4_khz / 1000;
-       dss1_rate = dss_clk_get_rate(DSS_CLK_FCK1) / 1000000;
+       dss1_rate = dss_clk_get_rate(DSS_CLK_FCK) / 1000000;
 
        for (i = 0; i < ARRAY_SIZE(ftab); i++) {
                /* Use a window instead of an exact match, to account
@@ -921,7 +921,7 @@ void rfbi_dump_regs(struct seq_file *s)
 {
 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, rfbi_read_reg(r))
 
-       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
 
        DUMPREG(RFBI_REVISION);
        DUMPREG(RFBI_SYSCONFIG);
@@ -952,7 +952,7 @@ void rfbi_dump_regs(struct seq_file *s)
        DUMPREG(RFBI_VSYNC_WIDTH);
        DUMPREG(RFBI_HSYNC_WIDTH);
 
-       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 #undef DUMPREG
 }
 

diff --git a/drivers/video/omap2/dss/sdi.c b/drivers/video/omap2/dss/sdi.c
index b64adf7dfc88b20963829245e0061c6ad1df4960..8272fc1f3279313eee83b3fd276f62f8316aec81 100644 (file)
--- a/drivers/video/omap2/dss/sdi.c
+++ b/drivers/video/omap2/dss/sdi.c
@@ -70,7 +70,7 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
 
        /* In case of skip_init sdi_init has already enabled the clocks */
        if (!sdi.skip_init)
-               dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+               dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
 
        sdi_basic_init(dssdev);
 
@@ -130,7 +130,7 @@ int omapdss_sdi_display_enable(struct omap_dss_device *dssdev)
 
        return 0;
 err2:
-       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
        regulator_disable(sdi.vdds_sdi_reg);
 err1:
        omap_dss_stop_device(dssdev);
@@ -145,7 +145,7 @@ void omapdss_sdi_display_disable(struct omap_dss_device *dssdev)
 
        dss_sdi_disable();
 
-       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1);
+       dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK);
 
        regulator_disable(sdi.vdds_sdi_reg);
 
@@ -175,7 +175,7 @@ int sdi_init(bool skip_init)
         * of them until sdi_display_enable is called.
         */
        if (skip_init)
-               dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1);
+               dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK);
        return 0;
 }
 

diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c
index ef36811f6ac8bddf64bdba16b1c9938abcdf1c40..1aadceb76e1d98405096df531fe6370d9bbf15cd 100644 (file)
--- a/drivers/video/omap2/dss/venc.c
+++ b/drivers/video/omap2/dss/venc.c
@@ -391,11 +391,11 @@ static void venc_reset(void)
 static void venc_enable_clocks(int enable)
 {
        if (enable)
-               dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_54M |
-                               DSS_CLK_96M);
+               dss_clk_enable(DSS_CLK_ICK | DSS_CLK_FCK | DSS_CLK_TVFCK |
+                               DSS_CLK_VIDFCK);
        else
-               dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK1 | DSS_CLK_54M |
-                               DSS_CLK_96M);
+               dss_clk_disable(DSS_CLK_ICK | DSS_CLK_FCK | DSS_CLK_TVFCK |
+                               DSS_CLK_VIDFCK);
 }
 
 static const struct venc_config *venc_timings_to_config(