[MTD] [CHIPS] cfi_cmdset_0001.c: Fix a bug in inval_cache_and_wait_for_operation().

If the inval_cache_and_wait_for_operation() is re-entered by write operation when erase
operation is in progress, the chip->erase_suspended will be cleared, this cause the erase
timeo is not reset and will result time out error for erase.

Signed-off-by: Graff Yang <graff.yang@gmail.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>

diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c
index f5ab6fa1057bdc422816c8f5e317de466a65107f..c240454fd113d757794141a160eaaac60015c036 100644 (file)
--- a/drivers/mtd/chips/cfi_cmdset_0001.c
+++ b/drivers/mtd/chips/cfi_cmdset_0001.c
@@ -1236,10 +1236,14 @@ static int inval_cache_and_wait_for_operation(
                        remove_wait_queue(&chip->wq, &wait);
                        spin_lock(chip->mutex);
                }
-               if (chip->erase_suspended || chip->write_suspended)  {
-                       /* Suspend has occured while sleep: reset timeout */
+               if (chip->erase_suspended && chip_state == FL_ERASING)  {
+                       /* Erase suspend occured while sleep: reset timeout */
                        timeo = reset_timeo;
                        chip->erase_suspended = 0;
+               }
+               if (chip->write_suspended && chip_state == FL_WRITING)  {
+                       /* Write suspend occured while sleep: reset timeout */
+                       timeo = reset_timeo;
                        chip->write_suspended = 0;
                }
        }