};
struct sa1100_irda {
- unsigned char hscr0;
unsigned char utcr4;
unsigned char power;
unsigned char open;
/*
* First empty receive FIFO
*/
- Ser2HSCR0 = si->hscr0 | HSCR0_HSSP;
+ Ser2HSCR0 = HSCR0_HSSP;
/*
* Enable the DMA, receiver and receive interrupt.
*/
sa1100_clear_dma(si->dma_rx.regs);
sa1100_start_dma(si->dma_rx.regs, si->dma_rx.dma, HPSIR_MAX_RXLEN);
- Ser2HSCR0 = si->hscr0 | HSCR0_HSSP | HSCR0_RXE;
+ Ser2HSCR0 = HSCR0_HSSP | HSCR0_RXE;
}
static void sa1100_irda_check_speed(struct sa1100_irda *si)
if (mtt)
udelay(mtt);
- Ser2HSCR0 = si->hscr0 | HSCR0_HSSP | HSCR0_TXE;
+ Ser2HSCR0 = HSCR0_HSSP | HSCR0_TXE;
return NETDEV_TX_OK;
}
/*
* Clear out the DMA...
*/
- Ser2HSCR0 = si->hscr0 | HSCR0_HSSP;
+ Ser2HSCR0 = HSCR0_HSSP;
/*
* Clear selected status bits now, so we
case 4000000:
local_irq_save(flags);
- si->hscr0 = 0;
-
Ser2HSSR0 = 0xff;
- Ser2HSCR0 = si->hscr0 | HSCR0_HSSP;
+ Ser2HSCR0 = HSCR0_HSSP;
Ser2UTCR3 = 0;
si->speed = speed;