r8169:Fix typo in setting RTL8168EP and RTL8168H D3cold PFM mode
authorChun-Hao Lin <hau@realtek.com>
Tue, 29 Dec 2015 14:13:37 +0000 (22:13 +0800)
committerDavid S. Miller <davem@davemloft.net>
Mon, 4 Jan 2016 21:50:48 +0000 (16:50 -0500)
The register for setting D3code PFM mode is  MISC_1, not DLLPR.

Signed-off-by: Chunhao Lin <hau@realtek.com>
Reviewed-by: Francois Romieu <romieu@fr.zoreil.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/ethernet/realtek/r8169.c

index 58365bcf2370fd3e78b4aef69eb71f3d11e11f72..0decc1b7bafd9abd14d341bd6995d3426b274417 100644 (file)
@@ -6127,7 +6127,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
        RTL_W8(EEE_LED, RTL_R8(EEE_LED) & ~0x07);
 
        RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);
-       RTL_W8(DLLPR, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);
+       RTL_W8(MISC_1, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);
 
        RTL_W8(DLLPR, RTL_R8(DLLPR) & ~TX_10M_PS_EN);
 
@@ -6252,7 +6252,7 @@ static void rtl_hw_start_8168ep_2(struct rtl8169_private *tp)
        rtl_hw_start_8168ep(tp);
 
        RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);
-       RTL_W8(DLLPR, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);
+       RTL_W8(MISC_1, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);
 }
 
 static void rtl_hw_start_8168ep_3(struct rtl8169_private *tp)
@@ -6274,7 +6274,7 @@ static void rtl_hw_start_8168ep_3(struct rtl8169_private *tp)
        rtl_hw_start_8168ep(tp);
 
        RTL_W8(DLLPR, RTL_R8(DLLPR) & ~PFM_EN);
-       RTL_W8(DLLPR, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);
+       RTL_W8(MISC_1, RTL_R8(MISC_1) & ~PFM_D3COLD_EN);
 
        data = r8168_mac_ocp_read(tp, 0xd3e2);
        data &= 0xf000;