ARM: dts: Add clocks to DISP1 domain in exynos5250
authorTomeu Vizoso <tomeu.vizoso@collabora.com>
Thu, 15 Oct 2015 10:31:24 +0000 (12:31 +0200)
committerKukjin Kim <kgene@kernel.org>
Fri, 23 Oct 2015 19:31:47 +0000 (04:31 +0900)
Adds to the node of the DISP1 power domain the two clocks that need to
be reparented while the domain is powered off:
CLK_MOUT_ACLK200_DISP1_SUB and CLK_MOUT_ACLK300_DISP1_SUB.

Otherwise the state is unknown at power up and the mixer's clocks are
all messed up.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Link: http://lkml.kernel.org/g/561CDC33.7050103@collabora.com
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
arch/arm/boot/dts/exynos5250.dtsi

index b24610ea8c2a93619bfe75770b63d1b67b61d680..88b9cf5f226f2ba27289e56642b1eb517ce69d96 100644 (file)
                compatible = "samsung,exynos4210-pd";
                reg = <0x100440A0 0x20>;
                #power-domain-cells = <0>;
+               clocks = <&clock CLK_FIN_PLL>,
+                        <&clock CLK_MOUT_ACLK200_DISP1_SUB>,
+                        <&clock CLK_MOUT_ACLK300_DISP1_SUB>;
+               clock-names = "oscclk", "clk0", "clk1";
        };
 
        clock: clock-controller@10010000 {