ARM: sun8i: a83t: Add device node for R_PIO

The A83T has 1 pingroup with 13 pins belonging to the R_PIO
or special pin controller.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>

diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts/sun8i-a83t.dtsi
index 49aeb56970bae62fe2930ec029f785c6aee63304..bf63e3b7757223f2023a23458f28394ba61669cd 100644 (file)
--- a/arch/arm/boot/dts/sun8i-a83t.dtsi
+++ b/arch/arm/boot/dts/sun8i-a83t.dtsi
@@ -44,6 +44,8 @@
 
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 
+#include <dt-bindings/clock/sun8i-r-ccu.h>
+
 / {
        interrupt-parent = <&gic>;
        #address-cells = <1>;
@@ -280,5 +282,18 @@
                        #clock-cells = <1>;
                        #reset-cells = <1>;
                };
+
+               r_pio: pinctrl@1f02c00 {
+                       compatible = "allwinner,sun8i-a83t-r-pinctrl";
+                       reg = <0x01f02c00 0x400>;
+                       interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>,
+                                <&osc16Md512>;
+                       clock-names = "apb", "hosc", "losc";
+                       gpio-controller;
+                       #gpio-cells = <3>;
+                       interrupt-controller;
+                       #interrupt-cells = <3>;
+               };
        };
 };