return in_be32(base + (reg >> 2));
}
-static inline void fsl_msi_write(u32 __iomem *base,
- unsigned int reg, u32 value)
-{
- out_be32(base + (reg >> 2), value);
-}
-
/*
* We do not need this actually. The MSIR register has been read once
* in the cascade interrupt. So, this MSI interrupt has been acked
get_irq_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING;
- set_irq_chip_and_handler(virq, chip, handle_edge_irq);
+ set_irq_chip_and_handler(virq, chip, handle_edge_irq);
return 0;
}
.map = fsl_msi_host_map,
};
-irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num)
+static irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num)
{
unsigned long flags;
- int offset, order = get_count_order(num);
+ int order = get_count_order(num);
+ int offset;
spin_lock_irqsave(&msi->bitmap_lock, flags);
return offset;
}
-void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num)
+static void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num)
{
unsigned long flags;
int order = get_count_order(num);
static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi)
{
- int i, len;
+ int i;
+ int len;
const u32 *p;
bitmap_allocate_region(msi->fsl_msi_bitmap, 0,
static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
{
- int rc, size;
-
- size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32);
+ int rc;
+ int size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32);
msi_data->fsl_msi_bitmap = kzalloc(size, GFP_KERNEL);
return rc;
}
-void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
+static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
{
unsigned int cascade_irq;
struct fsl_msi *msi_data = fsl_msi;
if (unlikely(desc->status & IRQ_INPROGRESS))
goto unlock;
- msir_index = (int)(desc->handler_data);
+ msir_index = (int)desc->handler_data;
if (msir_index >= NR_MSI_REG)
cascade_irq = NO_IRQ;
intr_index = ffs(msir_value) - 1;
cascade_irq = irq_linear_revmap(msi_data->irqhost,
- (msir_index * IRQS_PER_MSI_REG +
- intr_index + have_shift));
+ msir_index * IRQS_PER_MSI_REG +
+ intr_index + have_shift);
if (cascade_irq != NO_IRQ)
generic_handle_irq(cascade_irq);
- have_shift += (intr_index + 1);
- msir_value = (msir_value >> (intr_index + 1));
+ have_shift += intr_index + 1;
+ msir_value = msir_value >> (intr_index + 1);
}
desc->status &= ~IRQ_INPROGRESS;
int rc;
int virt_msir;
const u32 *p;
- struct fsl_msi_feature *tmp_data;
+ struct fsl_msi_feature *features = match->data;
printk(KERN_DEBUG "Setting up Freescale MSI support\n");
goto error_out;
}
- tmp_data = (struct fsl_msi_feature *)match->data;
-
- msi->feature = tmp_data->fsl_pic_ip;
+ msi->feature = features->fsl_pic_ip;
msi->irqhost->host_data = msi;
msi->msi_addr_hi = 0x0;
- msi->msi_addr_lo = res.start + tmp_data->msiir_offset;
+ msi->msi_addr_lo = res.start + features->msiir_offset;
rc = fsl_msi_init_allocator(msi);
if (rc) {