drm/i915/dp: Tweak auxch clock divider for PCH
authorAdam Jackson <ajax@redhat.com>
Tue, 26 Jul 2011 19:39:44 +0000 (15:39 -0400)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 17 Jan 2012 15:46:27 +0000 (16:46 +0100)
Matches the advice in the Sandybridge documentation.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_dp.c

index db3b461ad4124babfa70f931a584cd433fb788ab..add871911a6389c75a56df83ef44ca22b6d4c981 100644 (file)
@@ -378,7 +378,7 @@ intel_dp_aux_ch(struct intel_dp *intel_dp,
                else
                        aux_clock_divider = 225; /* eDP input clock at 450Mhz */
        } else if (HAS_PCH_SPLIT(dev))
-               aux_clock_divider = 62; /* IRL input clock fixed at 125Mhz */
+               aux_clock_divider = 63; /* IRL input clock fixed at 125Mhz */
        else
                aux_clock_divider = intel_hrawclk(dev) / 2;