ARM: dts: uniphier: add I2C controller device nodes

Add I2C controller device nodes for PH1-sLD3, PH1-LD4, PH1-sLD8
(FIFO-less I2C) and PH1-Pro4 (FIFO-builtin I2C).

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>

diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
index 7ac053d0ba1124922582d44ede6abdd7e6b277ad..5d24c57521c753464e9a06acf27c63caa3619756 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4-ref.dts
@@ -65,6 +65,10 @@
                serial1 = &serial1;
                serial2 = &serial2;
                serial3 = &serial3;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
        };
 };
 
@@ -93,6 +97,10 @@
        status = "okay";
 };
 
+&i2c0 {
+       status = "okay";
+};
+
 &usb0 {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
index 4add90b97eb809c1bfe707655047e772f4098e5a..a6a185fae8f1dcb0d39ffa61027c1bbcb5756aed 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-ld4.dtsi
@@ -70,6 +70,12 @@
                        compatible = "fixed-clock";
                        clock-frequency = <36864000>;
                };
+
+               iobus_clk: iobus_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <100000000>;
+               };
        };
 
        soc {
@@ -129,6 +135,58 @@
                        fifo-size = <64>;
                };
 
+               i2c0: i2c@58400000 {
+                       compatible = "socionext,uniphier-i2c";
+                       status = "disabled";
+                       reg = <0x58400000 0x40>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c0>;
+                       interrupts = <0 41 1>;
+                       clocks = <&iobus_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c1: i2c@58480000 {
+                       compatible = "socionext,uniphier-i2c";
+                       status = "disabled";
+                       reg = <0x58480000 0x40>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c1>;
+                       interrupts = <0 42 1>;
+                       clocks = <&iobus_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               /* chip-internal connection for DMD */
+               i2c2: i2c@58500000 {
+                       compatible = "socionext,uniphier-i2c";
+                       reg = <0x58500000 0x40>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c2>;
+                       interrupts = <0 43 1>;
+                       clocks = <&iobus_clk>;
+                       clock-frequency = <400000>;
+               };
+
+               i2c3: i2c@58580000 {
+                       compatible = "socionext,uniphier-i2c";
+                       status = "disabled";
+                       reg = <0x58580000 0x40>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c3>;
+                       interrupts = <0 44 1>;
+                       clocks = <&iobus_clk>;
+                       clock-frequency = <100000>;
+               };
+
                system-bus-controller-misc@59800000 {
                        compatible = "socionext,uniphier-system-bus-controller-misc",
                                     "syscon";

diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
index b669d32ff4a9e1bd890617e4f8e4e32dfd04bb2a..26c18ac710e94de4facbb5d19043278247d46663 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4-ref.dts
@@ -65,6 +65,12 @@
                serial1 = &serial1;
                serial2 = &serial2;
                serial3 = &serial3;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c5 = &i2c5;
+               i2c6 = &i2c6;
        };
 };
 
@@ -93,6 +99,10 @@
        status = "okay";
 };
 
+&i2c0 {
+       status = "okay";
+};
+
 &usb2 {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
index d0ca4c86c8e47908f0a577043371f8a6ea4ee026..e8bbc454d7887d9f8887065cc4a378fc7bc89a94 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-pro4.dtsi
@@ -77,6 +77,12 @@
                        compatible = "fixed-clock";
                        clock-frequency = <73728000>;
                };
+
+               i2c_clk: i2c_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <50000000>;
+               };
        };
 
        soc {
@@ -136,6 +142,82 @@
                        fifo-size = <64>;
                };
 
+               i2c0: i2c@58780000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       status = "disabled";
+                       reg = <0x58780000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c0>;
+                       interrupts = <0 41 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c1: i2c@58781000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       status = "disabled";
+                       reg = <0x58781000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c1>;
+                       interrupts = <0 42 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c2: i2c@58782000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       status = "disabled";
+                       reg = <0x58782000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c2>;
+                       interrupts = <0 43 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c3: i2c@58783000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       status = "disabled";
+                       reg = <0x58783000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c3>;
+                       interrupts = <0 44 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               /* i2c4 does not exist */
+
+               /* chip-internal connection for DMD */
+               i2c5: i2c@58785000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       reg = <0x58785000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <0 25 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <400000>;
+               };
+
+               /* chip-internal connection for HDMI */
+               i2c6: i2c@58786000 {
+                       compatible = "socionext,uniphier-fi2c";
+                       reg = <0x58786000 0x80>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <0 26 4>;
+                       clocks = <&i2c_clk>;
+                       clock-frequency = <400000>;
+               };
+
                system-bus-controller-misc@59800000 {
                        compatible = "socionext,uniphier-system-bus-controller-misc",
                                     "syscon";

diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
index 48f7361ee547789a2c77fa6405cddf95900498e0..cb6e9aa91bb48d42f1b91841e689b3b5c3dea8d3 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3-ref.dts
@@ -65,6 +65,11 @@
                serial0 = &serial0;
                serial1 = &serial1;
                serial2 = &serial2;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
+               i2c4 = &i2c4;
        };
 };
 
@@ -93,6 +98,10 @@
        status = "okay";
 };
 
+&i2c0 {
+       status = "okay";
+};
+
 &usb0 {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
index db74457232c5edbb7ddb37065aa7defdcaf0fb95..3cc90cd37a263b334635963153c3f9a4c21d1c9b 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld3.dtsi
@@ -77,6 +77,12 @@
                        compatible = "fixed-clock";
                        clock-frequency = <36864000>;
                };
+
+               iobus_clk: iobus_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <100000000>;
+               };
        };
 
        soc {
@@ -141,6 +147,61 @@
                        fifo-size = <64>;
                };
 
+               i2c0: i2c@58400000 {
+                       compatible = "socionext,uniphier-i2c";
+                       status = "disabled";
+                       reg = <0x58400000 0x40>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <0 41 1>;
+                       clocks = <&iobus_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c1: i2c@58480000 {
+                       compatible = "socionext,uniphier-i2c";
+                       status = "disabled";
+                       reg = <0x58480000 0x40>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <0 42 1>;
+                       clocks = <&iobus_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c2: i2c@58500000 {
+                       compatible = "socionext,uniphier-i2c";
+                       status = "disabled";
+                       reg = <0x58500000 0x40>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <0 43 1>;
+                       clocks = <&iobus_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c3: i2c@58580000 {
+                       compatible = "socionext,uniphier-i2c";
+                       status = "disabled";
+                       reg = <0x58580000 0x40>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <0 44 1>;
+                       clocks = <&iobus_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               /* chip-internal connection for DMD */
+               i2c4: i2c@58600000 {
+                       compatible = "socionext,uniphier-i2c";
+                       reg = <0x58600000 0x40>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       interrupts = <0 45 1>;
+                       clocks = <&iobus_clk>;
+                       clock-frequency = <400000>;
+               };
+
                system-bus-controller-misc@59800000 {
                        compatible = "socionext,uniphier-system-bus-controller-misc",
                                     "syscon";

diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
index 9b5992a778216c65276f0baee2b3504f4789ece3..a40a0fb8f23c2cc77516913615cbd1e494c65210 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8-ref.dts
@@ -65,6 +65,10 @@
                serial1 = &serial1;
                serial2 = &serial2;
                serial3 = &serial3;
+               i2c0 = &i2c0;
+               i2c1 = &i2c1;
+               i2c2 = &i2c2;
+               i2c3 = &i2c3;
        };
 };
 
@@ -93,6 +97,10 @@
        status = "okay";
 };
 
+&i2c0 {
+       status = "okay";
+};
+
 &usb0 {
        status = "okay";
 };

diff --git a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
index 3ead9102d02aea952546ae3e811d17142769f067..58067dfc16e592843ddfeb3a98ccb6b75abfd9ea 100644 (file)
--- a/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
+++ b/arch/arm/boot/dts/uniphier-ph1-sld8.dtsi
@@ -70,6 +70,12 @@
                        compatible = "fixed-clock";
                        clock-frequency = <80000000>;
                };
+
+               iobus_clk: iobus_clk {
+                       #clock-cells = <0>;
+                       compatible = "fixed-clock";
+                       clock-frequency = <100000000>;
+               };
        };
 
        soc {
@@ -129,6 +135,58 @@
                        fifo-size = <64>;
                };
 
+               i2c0: i2c@58400000 {
+                       compatible = "socionext,uniphier-i2c";
+                       status = "disabled";
+                       reg = <0x58400000 0x40>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c0>;
+                       interrupts = <0 41 1>;
+                       clocks = <&iobus_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               i2c1: i2c@58480000 {
+                       compatible = "socionext,uniphier-i2c";
+                       status = "disabled";
+                       reg = <0x58480000 0x40>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c1>;
+                       interrupts = <0 42 1>;
+                       clocks = <&iobus_clk>;
+                       clock-frequency = <100000>;
+               };
+
+               /* chip-internal connection for DMD */
+               i2c2: i2c@58500000 {
+                       compatible = "socionext,uniphier-i2c";
+                       reg = <0x58500000 0x40>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c2>;
+                       interrupts = <0 43 1>;
+                       clocks = <&iobus_clk>;
+                       clock-frequency = <400000>;
+               };
+
+               i2c3: i2c@58580000 {
+                       compatible = "socionext,uniphier-i2c";
+                       status = "disabled";
+                       reg = <0x58580000 0x40>;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&pinctrl_i2c3>;
+                       interrupts = <0 44 1>;
+                       clocks = <&iobus_clk>;
+                       clock-frequency = <100000>;
+               };
+
                system-bus-controller-misc@59800000 {
                        compatible = "socionext,uniphier-system-bus-controller-misc",
                                     "syscon";

diff --git a/arch/arm/boot/dts/uniphier-pinctrl.dtsi b/arch/arm/boot/dts/uniphier-pinctrl.dtsi
index 1b5b4fe65043d729bcd48b3b42e9fcb91fd13ddc..f67445f4f10da20358ae5183b0c84a7b955df038 100644 (file)
--- a/arch/arm/boot/dts/uniphier-pinctrl.dtsi
+++ b/arch/arm/boot/dts/uniphier-pinctrl.dtsi
@@ -43,6 +43,26 @@
  */
 
 &pinctrl {
+       pinctrl_i2c0: i2c0_grp {
+               groups = "i2c0";
+               function = "i2c0";
+       };
+
+       pinctrl_i2c1: i2c1_grp {
+               groups = "i2c1";
+               function = "i2c1";
+       };
+
+       pinctrl_i2c2: i2c2_grp {
+               groups = "i2c2";
+               function = "i2c2";
+       };
+
+       pinctrl_i2c3: i2c3_grp {
+               groups = "i2c3";
+               function = "i2c3";
+       };
+
        pinctrl_uart0: uart0_grp {
                groups = "uart0";
                function = "uart0";