drm/radeon/si: drop cg_update from dpm code

I'm not entirely sure this is required and it won't work
with the dpm restructing anyway.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index a36736dab5e0694cd5a7b78d6dbb013b484cb8f6..e3a9fc7a8020f5a0855b1cd9691c084baf4b5625 100644 (file)
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -5210,8 +5210,8 @@ static void si_enable_hdp_ls(struct radeon_device *rdev,
                WREG32(HDP_MEM_POWER_LS, data);
 }
 
-void si_update_cg(struct radeon_device *rdev,
-                 u32 block, bool enable)
+static void si_update_cg(struct radeon_device *rdev,
+                        u32 block, bool enable)
 {
        if (block & RADEON_CG_BLOCK_GFX) {
                si_enable_gui_idle_interrupt(rdev, false);

diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c
index 0b00c790fb7713d8b4cbddb91c9b319ecc41c3b9..2d0e94a63f7bd930b380a8c72519ce11f18bcc08 100644 (file)
--- a/drivers/gpu/drm/radeon/si_dpm.c
+++ b/drivers/gpu/drm/radeon/si_dpm.c
@@ -1753,9 +1753,6 @@ static int si_calculate_sclk_params(struct radeon_device *rdev,
                                    u32 engine_clock,
                                    SISLANDS_SMC_SCLK_VALUE *sclk);
 
-extern void si_update_cg(struct radeon_device *rdev,
-                        u32 block, bool enable);
-
 static struct si_power_info *si_get_pi(struct radeon_device *rdev)
 {
         struct si_power_info *pi = rdev->pm.dpm.priv;
@@ -5791,13 +5788,6 @@ int si_dpm_enable(struct radeon_device *rdev)
        struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
        int ret;
 
-       si_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                           RADEON_CG_BLOCK_MC |
-                           RADEON_CG_BLOCK_SDMA |
-                           RADEON_CG_BLOCK_BIF |
-                           RADEON_CG_BLOCK_UVD |
-                           RADEON_CG_BLOCK_HDP), false);
-
        if (si_is_smc_running(rdev))
                return -EINVAL;
        if (pi->voltage_control)
@@ -5917,13 +5907,6 @@ int si_dpm_enable(struct radeon_device *rdev)
 
        si_enable_auto_throttle_source(rdev, RADEON_DPM_AUTO_THROTTLE_SRC_THERMAL, true);
 
-       si_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                           RADEON_CG_BLOCK_MC |
-                           RADEON_CG_BLOCK_SDMA |
-                           RADEON_CG_BLOCK_BIF |
-                           RADEON_CG_BLOCK_UVD |
-                           RADEON_CG_BLOCK_HDP), true);
-
        ni_update_current_ps(rdev, boot_ps);
 
        return 0;
@@ -5934,13 +5917,6 @@ void si_dpm_disable(struct radeon_device *rdev)
        struct rv7xx_power_info *pi = rv770_get_pi(rdev);
        struct radeon_ps *boot_ps = rdev->pm.dpm.boot_ps;
 
-       si_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                           RADEON_CG_BLOCK_MC |
-                           RADEON_CG_BLOCK_SDMA |
-                           RADEON_CG_BLOCK_BIF |
-                           RADEON_CG_BLOCK_UVD |
-                           RADEON_CG_BLOCK_HDP), false);
-
        if (!si_is_smc_running(rdev))
                return;
        si_disable_ulv(rdev);
@@ -6005,13 +5981,6 @@ int si_dpm_set_power_state(struct radeon_device *rdev)
        struct radeon_ps *old_ps = &eg_pi->current_rps;
        int ret;
 
-       si_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                           RADEON_CG_BLOCK_MC |
-                           RADEON_CG_BLOCK_SDMA |
-                           RADEON_CG_BLOCK_BIF |
-                           RADEON_CG_BLOCK_UVD |
-                           RADEON_CG_BLOCK_HDP), false);
-
        ret = si_disable_ulv(rdev);
        if (ret) {
                DRM_ERROR("si_disable_ulv failed\n");
@@ -6104,13 +6073,6 @@ int si_dpm_set_power_state(struct radeon_device *rdev)
                return ret;
        }
 
-       si_update_cg(rdev, (RADEON_CG_BLOCK_GFX |
-                           RADEON_CG_BLOCK_MC |
-                           RADEON_CG_BLOCK_SDMA |
-                           RADEON_CG_BLOCK_BIF |
-                           RADEON_CG_BLOCK_UVD |
-                           RADEON_CG_BLOCK_HDP), true);
-
        return 0;
 }