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arm64: dts: hip05: Use Cortex specific device node for pmu
authorKefeng Wang <wangkefeng.wang@huawei.com>
Fri, 29 Jan 2016 08:39:02 +0000 (16:39 +0800)
committerWei Xu <xuwei5@hisilicon.com>
Thu, 25 Feb 2016 13:15:58 +0000 (21:15 +0800)
Instead of using the generic armv8-pmuv3 compatibility, use
the more specific Cortex A57 compatibility.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
arch/arm64/boot/dts/hisilicon/hip05.dtsi patch | blob | blame | history

diff --git a/arch/arm64/boot/dts/hisilicon/hip05.dtsi b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
index db2039d4cfda51b8015343c1884e9b2155bedb0e..ed31f1967687a39f476175c998ec6a8c46663fd1 100644 (file)
--- a/arch/arm64/boot/dts/hisilicon/hip05.dtsi
+++ b/arch/arm64/boot/dts/hisilicon/hip05.dtsi
@@ -262,7 +262,7 @@
        };
 
        pmu {
-               compatible = "arm,armv8-pmuv3";
+               compatible = "arm,cortex-a57-pmu";
                interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
        };