EDAC, mce_amd_inj: Read out number of MCE banks from the hardware

The number of banks for a given processor is encoded in
MSR_IA32_MCG_CAP[7:0]. So obtain the value from that MSR and use it for
sanity checking in inj_bank_set() instead of doing a family/model check.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: mchehab@osg.samsung.com
Link: http://lkml.kernel.org/r/1432753418-2985-3-git-send-email-Aravind.Gopalakrishnan@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>

diff --git a/drivers/edac/mce_amd_inj.c b/drivers/edac/mce_amd_inj.c
index 7f3a97a5ad171f465f2487faa628d66bc9ea1adc..15f6aa18b2f8af2a3d8bf82f067611975af86a28 100644 (file)
--- a/drivers/edac/mce_amd_inj.c
+++ b/drivers/edac/mce_amd_inj.c
@@ -25,6 +25,8 @@
 static struct mce i_mce;
 static struct dentry *dfs_inj;
 
+static u8 n_banks;
+
 #define MCE_INJECT_SET(reg)                                            \
 static int inj_##reg##_set(void *data, u64 val)                                \
 {                                                                      \
@@ -174,11 +176,9 @@ static int inj_bank_set(void *data, u64 val)
 {
        struct mce *m = (struct mce *)data;
 
-       if (val > 5) {
-               if (boot_cpu_data.x86 != 0x15 || val > 6) {
-                       pr_err("Non-existent MCE bank: %llu\n", val);
-                       return -EINVAL;
-               }
+       if (val >= n_banks) {
+               pr_err("Non-existent MCE bank: %llu\n", val);
+               return -EINVAL;
        }
 
        m->bank = val;
@@ -207,6 +207,10 @@ static struct dfs_node {
 static int __init init_mce_inject(void)
 {
        int i;
+       u64 cap;
+
+       rdmsrl(MSR_IA32_MCG_CAP, cap);
+       n_banks = cap & MCG_BANKCNT_MASK;
 
        dfs_inj = debugfs_create_dir("mce-inject", NULL);
        if (!dfs_inj)