clk: imx7d: Add the OCOTP clock
authorFabio Estevam <fabio.estevam@nxp.com>
Wed, 18 Jan 2017 17:53:56 +0000 (15:53 -0200)
committerStephen Boyd <sboyd@codeaurora.org>
Sat, 21 Jan 2017 00:27:19 +0000 (16:27 -0800)
Add the OCOTP so that this hardware block can be used.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
drivers/clk/imx/clk-imx7d.c
include/dt-bindings/clock/imx7d-clock.h

index e7c7353a86fc62f319a39c5a42cdc06214f4744c..ae1d31be906e4d5a169500f91b9fdca5b29b6ac2 100644 (file)
@@ -803,6 +803,7 @@ static void __init imx7d_clocks_init(struct device_node *ccm_node)
        clks[IMX7D_DRAM_PHYM_ROOT_CLK] = imx_clk_gate4("dram_phym_root_clk", "dram_phym_cg", base + 0x4130, 0);
        clks[IMX7D_DRAM_PHYM_ALT_ROOT_CLK] = imx_clk_gate4("dram_phym_alt_root_clk", "dram_phym_alt_post_div", base + 0x4130, 0);
        clks[IMX7D_DRAM_ALT_ROOT_CLK] = imx_clk_gate4("dram_alt_root_clk", "dram_alt_post_div", base + 0x4130, 0);
+       clks[IMX7D_OCOTP_CLK] = imx_clk_gate4("ocotp_clk", "ipg_root_clk", base + 0x4230, 0);
        clks[IMX7D_USB_HSIC_ROOT_CLK] = imx_clk_gate4("usb_hsic_root_clk", "usb_hsic_post_div", base + 0x4420, 0);
        clks[IMX7D_SDMA_CORE_CLK] = imx_clk_gate4("sdma_root_clk", "ahb_root_clk", base + 0x4480, 0);
        clks[IMX7D_PCIE_CTRL_ROOT_CLK] = imx_clk_gate4("pcie_ctrl_root_clk", "pcie_ctrl_post_div", base + 0x4600, 0);
index 1183347c383fe10d28f6c9171021283a2fefc4b8..a7a1a50f33efe98b00f6f818d2cca609019673bc 100644 (file)
 #define IMX7D_ADC_ROOT_CLK             436
 #define IMX7D_CLK_ARM                  437
 #define IMX7D_CKIL                     438
-#define IMX7D_CLK_END                  439
+#define IMX7D_OCOTP_CLK                        439
+#define IMX7D_CLK_END                  440
 #endif /* __DT_BINDINGS_CLOCK_IMX7D_H */