ARM: EXYNOS4: Add support new EXYNOS4212 SoC

This patch adds Samsung EXYNOS4212 SoC support.
The EXYNOS4212 integrates a ARM Cortex A9 multi-core.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>

diff --git a/arch/arm/mach-exynos4/Kconfig b/arch/arm/mach-exynos4/Kconfig
index bee8f77de2aba1b4844b2fc5e535d1b05a8c5b92..0b40289d4f732e6c0c9a95141b3bc07165b048f1 100644 (file)
--- a/arch/arm/mach-exynos4/Kconfig
+++ b/arch/arm/mach-exynos4/Kconfig
@@ -15,6 +15,11 @@ config CPU_EXYNOS4210
        help
          Enable EXYNOS4210 CPU support
 
+config SOC_EXYNOS4212
+       bool
+       help
+         Enable EXYNOS4212 SoC support
+
 config EXYNOS4_MCT
        bool
        default y

diff --git a/arch/arm/mach-exynos4/Makefile b/arch/arm/mach-exynos4/Makefile
index e3e93ea4138551400d2f75a267e4e0e079cab837..46244576452a65aedd3fa4185cc9cf2688f3a1b2 100644 (file)
--- a/arch/arm/mach-exynos4/Makefile
+++ b/arch/arm/mach-exynos4/Makefile
@@ -12,8 +12,10 @@ obj-                         :=
 
 # Core support for EXYNOS4 system
 
-obj-$(CONFIG_CPU_EXYNOS4210)   += cpu.o init.o clock.o irq-combiner.o
-obj-$(CONFIG_CPU_EXYNOS4210)   += setup-i2c0.o irq-eint.o dma.o pmu.o
+obj-$(CONFIG_ARCH_EXYNOS4)     += cpu.o init.o clock.o irq-combiner.o
+obj-$(CONFIG_ARCH_EXYNOS4)     += setup-i2c0.o irq-eint.o dma.o pmu.o
+obj-$(CONFIG_CPU_EXYNOS4210)   += clock-exynos4210.o
+obj-$(CONFIG_SOC_EXYNOS4212)   += clock-exynos4212.o
 obj-$(CONFIG_PM)               += pm.o sleep.o
 obj-$(CONFIG_CPU_IDLE)         += cpuidle.o
 

diff --git a/arch/arm/mach-exynos4/cpu.c b/arch/arm/mach-exynos4/cpu.c
index 0d281bbe345a2bc2b9c44d3fcee91259089d1b76..1e1a7a9d2ae7aeae792670691437c4aba8860881 100644 (file)
--- a/arch/arm/mach-exynos4/cpu.c
+++ b/arch/arm/mach-exynos4/cpu.c
@@ -241,7 +241,11 @@ static int __init exynos4_l2x0_cache_init(void)
 {
        /* TAG, Data Latency Control: 2cycle */
        __raw_writel(0x110, S5P_VA_L2CC + L2X0_TAG_LATENCY_CTRL);
-       __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
+
+       if (soc_is_exynos4210())
+               __raw_writel(0x110, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
+       else if (soc_is_exynos4212())
+               __raw_writel(0x120, S5P_VA_L2CC + L2X0_DATA_LATENCY_CTRL);
 
        /* L2X0 Prefetch Control */
        __raw_writel(0x30000007, S5P_VA_L2CC + L2X0_PREFETCH_CTRL);

diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index 04392c70d055347f0bbb98fc6905d690eeda4f3d..909507bae2fab89990abd8a5ffd183625cb3a87b 100644 (file)
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -33,6 +33,7 @@ static const char name_s5p6450[] = "S5P6450";
 static const char name_s5pc100[] = "S5PC100";
 static const char name_s5pv210[] = "S5PV210/S5PC110";
 static const char name_exynos4210[] = "EXYNOS4210";
+static const char name_exynos4212[] = "EXYNOS4212";
 
 static struct cpu_table cpu_ids[] __initdata = {
        {
@@ -75,6 +76,14 @@ static struct cpu_table cpu_ids[] __initdata = {
                .init_uarts     = exynos4_init_uarts,
                .init           = exynos4_init,
                .name           = name_exynos4210,
+       }, {
+               .idcode         = EXYNOS4212_CPU_ID,
+               .idmask         = EXYNOS4_CPU_MASK,
+               .map_io         = exynos4_map_io,
+               .init_clocks    = exynos4_init_clocks,
+               .init_uarts     = exynos4_init_uarts,
+               .init           = exynos4_init,
+               .name           = name_exynos4212,
        },
 };
 

diff --git a/arch/arm/plat-s5p/include/plat/exynos4.h b/arch/arm/plat-s5p/include/plat/exynos4.h
index 907caab53dcfacf6715b0da93f70ae2f801eb9d6..4aed1305df5d74cdffd9ed8d8f1397e2cce8a861 100644 (file)
--- a/arch/arm/plat-s5p/include/plat/exynos4.h
+++ b/arch/arm/plat-s5p/include/plat/exynos4.h
@@ -16,8 +16,7 @@ extern void exynos4_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
 extern void exynos4_register_clocks(void);
 extern void exynos4_setup_clocks(void);
 
-#ifdef CONFIG_CPU_EXYNOS4210
-
+#ifdef CONFIG_ARCH_EXYNOS4
 extern  int exynos4_init(void);
 extern void exynos4_init_irq(void);
 extern void exynos4_map_io(void);

diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h
index efd920ec3b752800c5eb2b414ac065fefa4e52b5..1bbbbb420be77e38d39be116f69bc2318cc8ef24 100644 (file)
--- a/arch/arm/plat-samsung/include/plat/cpu.h
+++ b/arch/arm/plat-samsung/include/plat/cpu.h
@@ -39,6 +39,7 @@ extern unsigned long samsung_cpu_id;
 #define S5PV210_CPU_MASK       0xFFFFF000
 
 #define EXYNOS4210_CPU_ID      0x43210000
+#define EXYNOS4212_CPU_ID      0x43220000
 #define EXYNOS4_CPU_MASK       0xFFFE0000
 
 #define IS_SAMSUNG_CPU(name, id, mask)         \
@@ -54,6 +55,7 @@ IS_SAMSUNG_CPU(s5p6450, S5P6450_CPU_ID, S5P64XX_CPU_MASK)
 IS_SAMSUNG_CPU(s5pc100, S5PC100_CPU_ID, S5PC100_CPU_MASK)
 IS_SAMSUNG_CPU(s5pv210, S5PV210_CPU_ID, S5PV210_CPU_MASK)
 IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
+IS_SAMSUNG_CPU(exynos4212, EXYNOS4212_CPU_ID, EXYNOS4_CPU_MASK)
 
 #if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \
     defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \
@@ -100,6 +102,12 @@ IS_SAMSUNG_CPU(exynos4210, EXYNOS4210_CPU_ID, EXYNOS4_CPU_MASK)
 # define soc_is_exynos4210()   0
 #endif
 
+#if defined(CONFIG_SOC_EXYNOS4212)
+# define soc_is_exynos4212()   is_samsung_exynos4212()
+#else
+# define soc_is_exynos4212()   0
+#endif
+
 #define EXYNOS4210_REV_0       (0x0)
 #define EXYNOS4210_REV_1_0     (0x10)
 #define EXYNOS4210_REV_1_1     (0x11)