ARM: OMAP: Proper handling of DMA4_IRQSTATUS_L0
authorTimo Teras <timo.teras@solidboot.com>
Thu, 7 Dec 2006 01:13:52 +0000 (17:13 -0800)
committerTony Lindgren <tony@atomide.com>
Fri, 2 Mar 2007 09:47:09 +0000 (01:47 -0800)
The register bits are reset by writing one. Remove the unneeded reads and
fix writes to not clear too many bits.

Signed-off-by: Timo Teras <timo.teras@solidboot.com>
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
arch/arm/plat-omap/dma.c

index bb045e5ddbd837e3906a90415e5800b383c6dd08..f3f84fbf8b875da63e8cf10bf178745a2eff2a7d 100644 (file)
@@ -557,7 +557,7 @@ int omap_request_dma(int dev_id, const char *dev_name,
                omap_enable_channel_irq(free_ch);
                /* Clear the CSR register and IRQ status register */
                OMAP_DMA_CSR_REG(free_ch) = OMAP2_DMA_CSR_CLEAR_MASK;
-               omap_writel(~0x0, OMAP_DMA4_IRQSTATUS_L0);
+               omap_writel(1 << free_ch, OMAP_DMA4_IRQSTATUS_L0);
        }
 
        *dma_ch_out = free_ch;
@@ -597,10 +597,7 @@ void omap_free_dma(int lch)
 
                /* Clear the CSR register and IRQ status register */
                OMAP_DMA_CSR_REG(lch) = OMAP2_DMA_CSR_CLEAR_MASK;
-
-               val = omap_readl(OMAP_DMA4_IRQSTATUS_L0);
-               val |= 1 << lch;
-               omap_writel(val, OMAP_DMA4_IRQSTATUS_L0);
+               omap_writel(1 << lch, OMAP_DMA4_IRQSTATUS_L0);
 
                /* Disable all DMA interrupts for the channel. */
                OMAP_DMA_CICR_REG(lch) = 0;
@@ -927,7 +924,6 @@ static irqreturn_t omap1_dma_irq_handler(int irq, void *dev_id)
 static int omap2_dma_handle_ch(int ch)
 {
        u32 status = OMAP_DMA_CSR_REG(ch);
-       u32 val;
 
        if (!status)
                return 0;
@@ -948,11 +944,7 @@ static int omap2_dma_handle_ch(int ch)
                       dma_chan[ch].dev_id);
 
        OMAP_DMA_CSR_REG(ch) = OMAP2_DMA_CSR_CLEAR_MASK;
-
-       val = omap_readl(OMAP_DMA4_IRQSTATUS_L0);
-       /* ch in this function is from 0-31 while in register it is 1-32 */
-       val = 1 << (ch);
-       omap_writel(val, OMAP_DMA4_IRQSTATUS_L0);
+       omap_writel(1 << ch, OMAP_DMA4_IRQSTATUS_L0);
 
        if (likely(dma_chan[ch].callback != NULL))
                dma_chan[ch].callback(ch, status, dma_chan[ch].data);