bcma: use _PMU_ in all names of PMU registers

PMU (Power Management Unit) seems to be a separated piece of hardware,
just accessed using ChipCommon core registers. In recent Broadcom
chipsets PMU is not bounded to CC but available as separated core.

To make code cleaner & easier to review (for a correct R/W access) use
clearer names.

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>

diff --git a/drivers/bcma/driver_chipcommon_pmu.c b/drivers/bcma/driver_chipcommon_pmu.c
index fe0d48cb17788a9f3614fd8a36add7bac5f58848..472f39dc5a38a087e9e18f65da03810a51e4344b 100644 (file)
--- a/drivers/bcma/driver_chipcommon_pmu.c
+++ b/drivers/bcma/driver_chipcommon_pmu.c
@@ -15,44 +15,44 @@
 
 u32 bcma_chipco_pll_read(struct bcma_drv_cc *cc, u32 offset)
 {
-       bcma_cc_write32(cc, BCMA_CC_PLLCTL_ADDR, offset);
-       bcma_cc_read32(cc, BCMA_CC_PLLCTL_ADDR);
-       return bcma_cc_read32(cc, BCMA_CC_PLLCTL_DATA);
+       bcma_cc_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR, offset);
+       bcma_cc_read32(cc, BCMA_CC_PMU_PLLCTL_ADDR);
+       return bcma_cc_read32(cc, BCMA_CC_PMU_PLLCTL_DATA);
 }
 EXPORT_SYMBOL_GPL(bcma_chipco_pll_read);
 
 void bcma_chipco_pll_write(struct bcma_drv_cc *cc, u32 offset, u32 value)
 {
-       bcma_cc_write32(cc, BCMA_CC_PLLCTL_ADDR, offset);
-       bcma_cc_read32(cc, BCMA_CC_PLLCTL_ADDR);
-       bcma_cc_write32(cc, BCMA_CC_PLLCTL_DATA, value);
+       bcma_cc_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR, offset);
+       bcma_cc_read32(cc, BCMA_CC_PMU_PLLCTL_ADDR);
+       bcma_cc_write32(cc, BCMA_CC_PMU_PLLCTL_DATA, value);
 }
 EXPORT_SYMBOL_GPL(bcma_chipco_pll_write);
 
 void bcma_chipco_pll_maskset(struct bcma_drv_cc *cc, u32 offset, u32 mask,
                             u32 set)
 {
-       bcma_cc_write32(cc, BCMA_CC_PLLCTL_ADDR, offset);
-       bcma_cc_read32(cc, BCMA_CC_PLLCTL_ADDR);
-       bcma_cc_maskset32(cc, BCMA_CC_PLLCTL_DATA, mask, set);
+       bcma_cc_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR, offset);
+       bcma_cc_read32(cc, BCMA_CC_PMU_PLLCTL_ADDR);
+       bcma_cc_maskset32(cc, BCMA_CC_PMU_PLLCTL_DATA, mask, set);
 }
 EXPORT_SYMBOL_GPL(bcma_chipco_pll_maskset);
 
 void bcma_chipco_chipctl_maskset(struct bcma_drv_cc *cc,
                                 u32 offset, u32 mask, u32 set)
 {
-       bcma_cc_write32(cc, BCMA_CC_CHIPCTL_ADDR, offset);
-       bcma_cc_read32(cc, BCMA_CC_CHIPCTL_ADDR);
-       bcma_cc_maskset32(cc, BCMA_CC_CHIPCTL_DATA, mask, set);
+       bcma_cc_write32(cc, BCMA_CC_PMU_CHIPCTL_ADDR, offset);
+       bcma_cc_read32(cc, BCMA_CC_PMU_CHIPCTL_ADDR);
+       bcma_cc_maskset32(cc, BCMA_CC_PMU_CHIPCTL_DATA, mask, set);
 }
 EXPORT_SYMBOL_GPL(bcma_chipco_chipctl_maskset);
 
 void bcma_chipco_regctl_maskset(struct bcma_drv_cc *cc, u32 offset, u32 mask,
                                u32 set)
 {
-       bcma_cc_write32(cc, BCMA_CC_REGCTL_ADDR, offset);
-       bcma_cc_read32(cc, BCMA_CC_REGCTL_ADDR);
-       bcma_cc_maskset32(cc, BCMA_CC_REGCTL_DATA, mask, set);
+       bcma_cc_write32(cc, BCMA_CC_PMU_REGCTL_ADDR, offset);
+       bcma_cc_read32(cc, BCMA_CC_PMU_REGCTL_ADDR);
+       bcma_cc_maskset32(cc, BCMA_CC_PMU_REGCTL_DATA, mask, set);
 }
 EXPORT_SYMBOL_GPL(bcma_chipco_regctl_maskset);
 
@@ -472,8 +472,8 @@ u32 bcma_pmu_get_cpu_clock(struct bcma_drv_cc *cc)
 static void bcma_pmu_spuravoid_pll_write(struct bcma_drv_cc *cc, u32 offset,
                                         u32 value)
 {
-       bcma_cc_write32(cc, BCMA_CC_PLLCTL_ADDR, offset);
-       bcma_cc_write32(cc, BCMA_CC_PLLCTL_DATA, value);
+       bcma_cc_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR, offset);
+       bcma_cc_write32(cc, BCMA_CC_PMU_PLLCTL_DATA, value);
 }
 
 void bcma_pmu_spuravoid_pllupdate(struct bcma_drv_cc *cc, int spuravoid)
@@ -497,20 +497,20 @@ void bcma_pmu_spuravoid_pllupdate(struct bcma_drv_cc *cc, int spuravoid)
                       bus->chipinfo.id == BCMA_CHIP_ID_BCM53572) ? 6 : 0;
 
                /* RMW only the P1 divider */
-               bcma_cc_write32(cc, BCMA_CC_PLLCTL_ADDR,
+               bcma_cc_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR,
                                BCMA_CC_PMU_PLL_CTL0 + phypll_offset);
-               tmp = bcma_cc_read32(cc, BCMA_CC_PLLCTL_DATA);
+               tmp = bcma_cc_read32(cc, BCMA_CC_PMU_PLLCTL_DATA);
                tmp &= (~(BCMA_CC_PMU1_PLL0_PC0_P1DIV_MASK));
                tmp |= (bcm5357_bcm43236_p1div[spuravoid] << BCMA_CC_PMU1_PLL0_PC0_P1DIV_SHIFT);
-               bcma_cc_write32(cc, BCMA_CC_PLLCTL_DATA, tmp);
+               bcma_cc_write32(cc, BCMA_CC_PMU_PLLCTL_DATA, tmp);
 
                /* RMW only the int feedback divider */
-               bcma_cc_write32(cc, BCMA_CC_PLLCTL_ADDR,
+               bcma_cc_write32(cc, BCMA_CC_PMU_PLLCTL_ADDR,
                                BCMA_CC_PMU_PLL_CTL2 + phypll_offset);
-               tmp = bcma_cc_read32(cc, BCMA_CC_PLLCTL_DATA);
+               tmp = bcma_cc_read32(cc, BCMA_CC_PMU_PLLCTL_DATA);
                tmp &= ~(BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_MASK);
                tmp |= (bcm5357_bcm43236_ndiv[spuravoid]) << BCMA_CC_PMU1_PLL0_PC2_NDIV_INT_SHIFT;
-               bcma_cc_write32(cc, BCMA_CC_PLLCTL_DATA, tmp);
+               bcma_cc_write32(cc, BCMA_CC_PMU_PLLCTL_DATA, tmp);
 
                tmp = BCMA_CC_PMU_CTL_PLL_UPD;
                break;

diff --git a/drivers/net/wireless/broadcom/b43/main.c b/drivers/net/wireless/broadcom/b43/main.c
index ec013fbd6a81cda4a0cce04a74b469c1f3cda532..c279211e49f91440c7cd48a52feb93a9cbd3580d 100644 (file)
--- a/drivers/net/wireless/broadcom/b43/main.c
+++ b/drivers/net/wireless/broadcom/b43/main.c
@@ -1215,10 +1215,10 @@ void b43_wireless_core_phy_pll_reset(struct b43_wldev *dev)
        case B43_BUS_BCMA:
                bcma_cc = &dev->dev->bdev->bus->drv_cc;
 
-               bcma_cc_write32(bcma_cc, BCMA_CC_CHIPCTL_ADDR, 0);
-               bcma_cc_mask32(bcma_cc, BCMA_CC_CHIPCTL_DATA, ~0x4);
-               bcma_cc_set32(bcma_cc, BCMA_CC_CHIPCTL_DATA, 0x4);
-               bcma_cc_mask32(bcma_cc, BCMA_CC_CHIPCTL_DATA, ~0x4);
+               bcma_cc_write32(bcma_cc, BCMA_CC_PMU_CHIPCTL_ADDR, 0);
+               bcma_cc_mask32(bcma_cc, BCMA_CC_PMU_CHIPCTL_DATA, ~0x4);
+               bcma_cc_set32(bcma_cc, BCMA_CC_PMU_CHIPCTL_DATA, 0x4);
+               bcma_cc_mask32(bcma_cc, BCMA_CC_PMU_CHIPCTL_DATA, ~0x4);
                break;
 #endif
 #ifdef CONFIG_B43_SSB

diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h
index db51a6ffb7d6839ba1ffd08ffd072faed79031dc..96d8d56f240fac4291464a915d475b5529115e89 100644 (file)
--- a/include/linux/bcma/bcma_driver_chipcommon.h
+++ b/include/linux/bcma/bcma_driver_chipcommon.h
@@ -351,12 +351,12 @@
 #define BCMA_CC_PMU_RES_REQTS          0x0640 /* PMU res req timer sel */
 #define BCMA_CC_PMU_RES_REQT           0x0644 /* PMU res req timer */
 #define BCMA_CC_PMU_RES_REQM           0x0648 /* PMU res req mask */
-#define BCMA_CC_CHIPCTL_ADDR           0x0650
-#define BCMA_CC_CHIPCTL_DATA           0x0654
-#define BCMA_CC_REGCTL_ADDR            0x0658
-#define BCMA_CC_REGCTL_DATA            0x065C
-#define BCMA_CC_PLLCTL_ADDR            0x0660
-#define BCMA_CC_PLLCTL_DATA            0x0664
+#define BCMA_CC_PMU_CHIPCTL_ADDR       0x0650
+#define BCMA_CC_PMU_CHIPCTL_DATA       0x0654
+#define BCMA_CC_PMU_REGCTL_ADDR                0x0658
+#define BCMA_CC_PMU_REGCTL_DATA                0x065C
+#define BCMA_CC_PMU_PLLCTL_ADDR                0x0660
+#define BCMA_CC_PMU_PLLCTL_DATA                0x0664
 #define BCMA_CC_PMU_STRAPOPT           0x0668 /* (corerev >= 28) */
 #define BCMA_CC_PMU_XTAL_FREQ          0x066C /* (pmurev >= 10) */
 #define  BCMA_CC_PMU_XTAL_FREQ_ILPCTL_MASK     0x00001FFF