* fallback to the default.
*/
static inline void __iomem *
-__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags, unsigned long align)
+__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned long flags)
{
- extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
if((addr < 0x48000000) || (addr > 0x4fffffff))
- return __ioremap(addr, size, flags, align);
+ return __ioremap(addr, size, flags);
return (void *)addr;
}
static inline void
__ixp4xx_iounmap(void __iomem *addr)
{
- extern void __iounmap(void __iomem *addr);
-
if ((u32)addr >= VMALLOC_START)
__iounmap(addr);
}
-#define __arch_ioremap(a, s, f, x) __ixp4xx_ioremap(a, s, f, x)
+#define __arch_ioremap(a, s, f) __ixp4xx_ioremap(a, s, f)
#define __arch_iounmap(a) __ixp4xx_iounmap(a)
#define writeb(v, p) __ixp4xx_writeb(v, p)
#define __raw_readw(a) (__chk_io_ptr(a), *(volatile unsigned short __force *)(a))
#define __raw_readl(a) (__chk_io_ptr(a), *(volatile unsigned int __force *)(a))
+/*
+ * Architecture ioremap implementation.
+ */
+extern void __iomem * __ioremap(unsigned long, size_t, unsigned long);
+extern void __iounmap(void __iomem *addr);
+
/*
* Bad read/write accesses...
*/
* ioremap takes a PCI memory address, as specified in
* Documentation/IO-mapping.txt.
*/
-extern void __iomem * __ioremap(unsigned long, size_t, unsigned long, unsigned long);
-extern void __iounmap(void __iomem *addr);
-
#ifndef __arch_ioremap
-#define ioremap(cookie,size) __ioremap(cookie,size,0,1)
-#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0,1)
-#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE,1)
+#define ioremap(cookie,size) __ioremap(cookie,size,0)
+#define ioremap_nocache(cookie,size) __ioremap(cookie,size,0)
+#define ioremap_cached(cookie,size) __ioremap(cookie,size,L_PTE_CACHEABLE)
#define iounmap(cookie) __iounmap(cookie)
#else
-#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0,1)
-#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0,1)
-#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE,1)
+#define ioremap(cookie,size) __arch_ioremap((cookie),(size),0)
+#define ioremap_nocache(cookie,size) __arch_ioremap((cookie),(size),0)
+#define ioremap_cached(cookie,size) __arch_ioremap((cookie),(size),L_PTE_CACHEABLE)
#define iounmap(cookie) __arch_iounmap(cookie)
#endif