struct i2c_device_addr *dev_addr = NULL;
int rc;
- const u8 vsb_ffe_leak_gain_ram0[] = {
+ static const u8 vsb_ffe_leak_gain_ram0[] = {
DRXJ_16TO8(0x8), /* FFETRAINLKRATIO1 */
DRXJ_16TO8(0x8), /* FFETRAINLKRATIO2 */
DRXJ_16TO8(0x8), /* FFETRAINLKRATIO3 */
DRXJ_16TO8(0x1010) /* FIRRCA1GAIN8 */
};
- const u8 vsb_ffe_leak_gain_ram1[] = {
+ static const u8 vsb_ffe_leak_gain_ram1[] = {
DRXJ_16TO8(0x1010), /* FIRRCA1GAIN9 */
DRXJ_16TO8(0x0808), /* FIRRCA1GAIN10 */
DRXJ_16TO8(0x0808), /* FIRRCA1GAIN11 */
struct drxj_data *ext_attr = NULL;
u16 cmd_result = 0;
u16 cmd_param = 0;
- const u8 vsb_taps_re[] = {
+ static const u8 vsb_taps_re[] = {
DRXJ_16TO8(-2), /* re0 */
DRXJ_16TO8(4), /* re1 */
DRXJ_16TO8(1), /* re2 */
{
struct i2c_device_addr *dev_addr = demod->my_i2c_dev_addr;
int rc;
- const u8 qam_dq_qual_fun[] = {
+ static const u8 qam_dq_qual_fun[] = {
DRXJ_16TO8(2), /* fun0 */
DRXJ_16TO8(2), /* fun1 */
DRXJ_16TO8(2), /* fun2 */
DRXJ_16TO8(3), /* fun4 */
DRXJ_16TO8(3), /* fun5 */
};
- const u8 qam_eq_cma_rad[] = {
+ static const u8 qam_eq_cma_rad[] = {
DRXJ_16TO8(13517), /* RAD0 */
DRXJ_16TO8(13517), /* RAD1 */
DRXJ_16TO8(13517), /* RAD2 */
{
struct i2c_device_addr *dev_addr = demod->my_i2c_dev_addr;
int rc;
- const u8 qam_dq_qual_fun[] = {
+ static const u8 qam_dq_qual_fun[] = {
DRXJ_16TO8(3), /* fun0 */
DRXJ_16TO8(3), /* fun1 */
DRXJ_16TO8(3), /* fun2 */
DRXJ_16TO8(4), /* fun4 */
DRXJ_16TO8(4), /* fun5 */
};
- const u8 qam_eq_cma_rad[] = {
+ static const u8 qam_eq_cma_rad[] = {
DRXJ_16TO8(6707), /* RAD0 */
DRXJ_16TO8(6707), /* RAD1 */
DRXJ_16TO8(6707), /* RAD2 */
{
struct i2c_device_addr *dev_addr = demod->my_i2c_dev_addr;
int rc;
- const u8 qam_dq_qual_fun[] = { /* this is hw reset value. no necessary to re-write */
+ static const u8 qam_dq_qual_fun[] = {
+ /* this is hw reset value. no necessary to re-write */
DRXJ_16TO8(4), /* fun0 */
DRXJ_16TO8(4), /* fun1 */
DRXJ_16TO8(4), /* fun2 */
DRXJ_16TO8(6), /* fun4 */
DRXJ_16TO8(6), /* fun5 */
};
- const u8 qam_eq_cma_rad[] = {
+ static const u8 qam_eq_cma_rad[] = {
DRXJ_16TO8(13336), /* RAD0 */
DRXJ_16TO8(12618), /* RAD1 */
DRXJ_16TO8(11988), /* RAD2 */
{
struct i2c_device_addr *dev_addr = demod->my_i2c_dev_addr;
int rc;
- const u8 qam_dq_qual_fun[] = {
+ static const u8 qam_dq_qual_fun[] = {
DRXJ_16TO8(6), /* fun0 */
DRXJ_16TO8(6), /* fun1 */
DRXJ_16TO8(6), /* fun2 */
DRXJ_16TO8(9), /* fun4 */
DRXJ_16TO8(9), /* fun5 */
};
- const u8 qam_eq_cma_rad[] = {
+ static const u8 qam_eq_cma_rad[] = {
DRXJ_16TO8(6164), /* RAD0 */
DRXJ_16TO8(6598), /* RAD1 */
DRXJ_16TO8(6394), /* RAD2 */
{
struct i2c_device_addr *dev_addr = demod->my_i2c_dev_addr;
int rc;
- const u8 qam_dq_qual_fun[] = {
+ static const u8 qam_dq_qual_fun[] = {
DRXJ_16TO8(8), /* fun0 */
DRXJ_16TO8(8), /* fun1 */
DRXJ_16TO8(8), /* fun2 */
DRXJ_16TO8(12), /* fun4 */
DRXJ_16TO8(12), /* fun5 */
};
- const u8 qam_eq_cma_rad[] = {
+ static const u8 qam_eq_cma_rad[] = {
DRXJ_16TO8(12345), /* RAD0 */
DRXJ_16TO8(12345), /* RAD1 */
DRXJ_16TO8(13626), /* RAD2 */
/* parameter */ NULL,
/* result */ NULL
};
- const u8 qam_a_taps[] = {
+ static const u8 qam_a_taps[] = {
DRXJ_16TO8(-1), /* re0 */
DRXJ_16TO8(1), /* re1 */
DRXJ_16TO8(1), /* re2 */
DRXJ_16TO8(-40), /* re26 */
DRXJ_16TO8(619) /* re27 */
};
- const u8 qam_b64_taps[] = {
+ static const u8 qam_b64_taps[] = {
DRXJ_16TO8(0), /* re0 */
DRXJ_16TO8(-2), /* re1 */
DRXJ_16TO8(1), /* re2 */
DRXJ_16TO8(-46), /* re26 */
DRXJ_16TO8(614) /* re27 */
};
- const u8 qam_b256_taps[] = {
+ static const u8 qam_b256_taps[] = {
DRXJ_16TO8(-2), /* re0 */
DRXJ_16TO8(4), /* re1 */
DRXJ_16TO8(1), /* re2 */
DRXJ_16TO8(-32), /* re26 */
DRXJ_16TO8(628) /* re27 */
};
- const u8 qam_c_taps[] = {
+ static const u8 qam_c_taps[] = {
DRXJ_16TO8(-3), /* re0 */
DRXJ_16TO8(3), /* re1 */
DRXJ_16TO8(2), /* re2 */