drm/i915: Use ktime to calculate rc0 residency

We have used cz timestamp register to gain a reference time wrt
to residency calculations. The residency counts are in cz clk ticks
(333Mhz clock) but for some reason the cz timestamp register gives
100us units. Perhaps for some other usage, the base-ten based values
are easier, but in residency calculations raw units would have been
the easiest.

As there is not much advantage of using base-ten clock through
a more costly punit access, take our reference times directly from
kernel clock.

v2: use ktime (Chris, Ville)

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 0374e2e4168128d26af1803e1e9d21a853a70142..6e14c7d089b88d41e36005021c55d2596e904cea 100644 (file)
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1323,7 +1323,7 @@ struct vlv_s0ix_state {
 };
 
 struct intel_rps_ei {
-       u32 cz_clock;
+       ktime_t ktime;
        u32 render_c0;
        u32 media_c0;
 };

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 736c7c4e7901e70992e6f819ea2670caf88f7115..fcefa45162b1406d880ef77ad4e693b22284ccfe 100644 (file)
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1078,7 +1078,7 @@ static void notify_ring(struct intel_engine_cs *engine)
 static void vlv_c0_read(struct drm_i915_private *dev_priv,
                        struct intel_rps_ei *ei)
 {
-       ei->cz_clock = vlv_punit_read(dev_priv, PUNIT_REG_CZ_TIMESTAMP);
+       ei->ktime = ktime_get_raw();
        ei->render_c0 = I915_READ(VLV_RENDER_C0_COUNT);
        ei->media_c0 = I915_READ(VLV_MEDIA_C0_COUNT);
 }
@@ -1098,19 +1098,17 @@ static u32 vlv_wa_c0_ei(struct drm_i915_private *dev_priv, u32 pm_iir)
                return 0;
 
        vlv_c0_read(dev_priv, &now);
-       if (now.cz_clock == 0)
-               return 0;
 
-       if (prev->cz_clock) {
+       if (prev->ktime) {
                u64 time, c0;
                u32 render, media;
                unsigned int mul;
 
-               mul = VLV_CZ_CLOCK_TO_MILLI_SEC * 100; /* scale to threshold% */
+               mul = 1000 * 100; /* scale to threshold% */
                if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH)
                        mul <<= 8;
 
-               time = now.cz_clock - prev->cz_clock;
+               time = ktime_us_delta(now.ktime, prev->ktime);
                time *= dev_priv->czclk_freq;
 
                /* Workload can be split between render + media,

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 5d88c35c41cda3ea984f6d0a3ff4ddc038ea548f..04c8f69fcc62e9147a50b46a69927751765d9191 100644 (file)
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -1140,8 +1140,6 @@ enum skl_disp_power_wells {
 #define        VLV_BIAS_CPU_125_SOC_875 (6 << 2)
 #define        CHV_BIAS_CPU_50_SOC_50 (3 << 2)
 
-#define VLV_CZ_CLOCK_TO_MILLI_SEC              100000
-
 /* vlv2 north clock has */
 #define CCK_FUSE_REG                           0x8
 #define  CCK_FUSE_HPLL_FREQ_MASK               0x3