mfd: sec-irq: Use consistent S2MPS11 RTC alarm interrupt indexes

The S2MPS11 RTC has two alarms: alarm0 and alarm1 (corresponding
interrupts are named similarly). Use consistent names for interrupts to
limit possible errors.

Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c
index 4de494f51d401b3d85544633621091d9e7cceff6..e403c293b437a1feaa19a59b20a1f59ae0ade739 100644 (file)
--- a/drivers/mfd/sec-irq.c
+++ b/drivers/mfd/sec-irq.c
@@ -59,13 +59,13 @@ static const struct regmap_irq s2mps11_irqs[] = {
                .reg_offset = 1,
                .mask = S2MPS11_IRQ_RTC60S_MASK,
        },
-       [S2MPS11_IRQ_RTCA1] = {
+       [S2MPS11_IRQ_RTCA0] = {
                .reg_offset = 1,
-               .mask = S2MPS11_IRQ_RTCA1_MASK,
+               .mask = S2MPS11_IRQ_RTCA0_MASK,
        },
-       [S2MPS11_IRQ_RTCA2] = {
+       [S2MPS11_IRQ_RTCA1] = {
                .reg_offset = 1,
-               .mask = S2MPS11_IRQ_RTCA2_MASK,
+               .mask = S2MPS11_IRQ_RTCA1_MASK,
        },
        [S2MPS11_IRQ_SMPL] = {
                .reg_offset = 1,

diff --git a/include/linux/mfd/samsung/irq.h b/include/linux/mfd/samsung/irq.h
index d43b4f9e7fb27ab4b5014592fe363d3a97ba153e..abe1a6aae3b7ea60dbfea6db42096032e2cf075f 100644 (file)
--- a/include/linux/mfd/samsung/irq.h
+++ b/include/linux/mfd/samsung/irq.h
@@ -24,8 +24,8 @@ enum s2mps11_irq {
        S2MPS11_IRQ_MRB,
 
        S2MPS11_IRQ_RTC60S,
+       S2MPS11_IRQ_RTCA0,
        S2MPS11_IRQ_RTCA1,
-       S2MPS11_IRQ_RTCA2,
        S2MPS11_IRQ_SMPL,
        S2MPS11_IRQ_RTC1S,
        S2MPS11_IRQ_WTSR,
@@ -47,7 +47,7 @@ enum s2mps11_irq {
 
 #define S2MPS11_IRQ_RTC60S_MASK                (1 << 0)
 #define S2MPS11_IRQ_RTCA1_MASK         (1 << 1)
-#define S2MPS11_IRQ_RTCA2_MASK         (1 << 2)
+#define S2MPS11_IRQ_RTCA0_MASK         (1 << 2)
 #define S2MPS11_IRQ_SMPL_MASK          (1 << 3)
 #define S2MPS11_IRQ_RTC1S_MASK         (1 << 4)
 #define S2MPS11_IRQ_WTSR_MASK          (1 << 5)