clk: renesas: r8a7795: Add EHCI/OHCI ch3 clock
authorTakeshi Kihara <takeshi.kihara.df@renesas.com>
Wed, 19 Apr 2017 17:46:23 +0000 (02:46 +0900)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 15 May 2017 07:46:31 +0000 (09:46 +0200)
This patch supports the clock of EHCI/OHCI ch3 module added from R8A7795
ES2.0 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
drivers/clk/renesas/r8a7795-cpg-mssr.c

index eaa98b488f015944c847274d7430205ec3cdf4a0..3eb8db1868e068859f07593a6728f8fbc20cbf0f 100644 (file)
@@ -189,6 +189,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
        DEF_MOD("vspi2",                 629,   R8A7795_CLK_S2D1), /* ES1.x */
        DEF_MOD("vspi1",                 630,   R8A7795_CLK_S0D1),
        DEF_MOD("vspi0",                 631,   R8A7795_CLK_S0D1),
+       DEF_MOD("ehci3",                 700,   R8A7795_CLK_S3D4),
        DEF_MOD("ehci2",                 701,   R8A7795_CLK_S3D4),
        DEF_MOD("ehci1",                 702,   R8A7795_CLK_S3D4),
        DEF_MOD("ehci0",                 703,   R8A7795_CLK_S3D4),