drm/amdgpu: save number of vce states in dpm struct.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
index 4f8d3a5a682ffe71eec4a856d0faa3f16a48dc27..009ccb9615417437f84cb1d1f120a993d1c78e5a 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.c
@@ -553,9 +553,10 @@ int amdgpu_parse_extended_power_table(struct amdgpu_device *adev)
                                entry = (ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record *)
                                        ((u8 *)entry + sizeof(ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record));
                        }
-                       for (i = 0; i < states->numEntries; i++) {
-                               if (i >= AMD_MAX_VCE_LEVELS)
-                                       break;
+                       adev->pm.dpm.num_of_vce_states =
+                                       states->numEntries > AMD_MAX_VCE_LEVELS ?
+                                       AMD_MAX_VCE_LEVELS : states->numEntries;
+                       for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
                                vce_clk = (VCEClockInfo *)
                                        ((u8 *)&array->entries[0] +
                                         (state_entry->ucVCEClockInfoIndex * sizeof(VCEClockInfo)));

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
index 68dac0c569fd0a31fd894e46501f97fe788cef5a..5097415d21727b94df7df3bf6a6182e010b90fde 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
@@ -387,6 +387,7 @@ struct amdgpu_dpm {
        /* default uvd power state */
        struct amdgpu_ps        *uvd_ps;
        /* vce requirements */
+       u32                  num_of_vce_states;
        struct amd_vce_state vce_states[AMD_MAX_VCE_LEVELS];
        enum amd_vce_level vce_level;
        enum amd_pm_state_type state;

diff --git a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
index dc3196e13256e43bb100415706b57f9241a789a8..fa939df942f4fa1e93fb34305e84e95e1ff7ecc5 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/ci_dpm.c
@@ -5689,7 +5689,7 @@ static int ci_parse_power_table(struct amdgpu_device *adev)
        adev->pm.dpm.num_ps = state_array->ucNumEntries;
 
        /* fill in the vce power states */
-       for (i = 0; i < AMD_MAX_VCE_LEVELS; i++) {
+       for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
                u32 sclk, mclk;
                clock_array_index = adev->pm.dpm.vce_states[i].clk_idx;
                clock_info = (union pplib_clock_info *)

diff --git a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
index a03690abe38df028232d010947cb50f9a41dcd5f..b23f643f6d0fa7fba6220a84d7ae9191cd79d7a7 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/kv_dpm.c
@@ -2796,7 +2796,7 @@ static int kv_parse_power_table(struct amdgpu_device *adev)
        adev->pm.dpm.num_ps = state_array->ucNumEntries;
 
        /* fill in the vce power states */
-       for (i = 0; i < AMD_MAX_VCE_LEVELS; i++) {
+       for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
                u32 sclk;
                clock_array_index = adev->pm.dpm.vce_states[i].clk_idx;
                clock_info = (union pplib_clock_info *)

diff --git a/drivers/gpu/drm/amd/amdgpu/si_dpm.c b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
index 15f9ca55bba95d34efff2723801718f6d9146e39..dbfecc29f2a13016d8c05f57718add7c163e6ab0 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/si_dpm.c
+++ b/drivers/gpu/drm/amd/amdgpu/si_dpm.c
@@ -7320,7 +7320,7 @@ static int si_parse_power_table(struct amdgpu_device *adev)
        adev->pm.dpm.num_ps = state_array->ucNumEntries;
 
        /* fill in the vce power states */
-       for (i = 0; i < AMD_MAX_VCE_LEVELS; i++) {
+       for (i = 0; i < adev->pm.dpm.num_of_vce_states; i++) {
                u32 sclk, mclk;
                clock_array_index = adev->pm.dpm.vce_states[i].clk_idx;
                clock_info = (union pplib_clock_info *)