drm/nouveau/mc/nv11: define reset masks + intr cleanup
authorBen Skeggs <bskeggs@redhat.com>
Fri, 8 Apr 2016 07:24:40 +0000 (17:24 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Fri, 20 May 2016 04:43:04 +0000 (14:43 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drivers/gpu/drm/nouveau/include/nvkm/subdev/mc.h
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/Kbuild
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv04.c
drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/subdev/mc/priv.h

index fb8f36f3554f80feef451e35888b2b6d8baeb252..2e80682b2da1a7305d65c5911c099697120bef68 100644 (file)
@@ -14,6 +14,7 @@ void nvkm_mc_reset(struct nvkm_mc *, enum nvkm_devidx);
 void nvkm_mc_unk260(struct nvkm_mc *, u32 data);
 
 int nv04_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
+int nv11_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int nv17_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int nv44_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
 int nv50_mc_new(struct nvkm_device *, int, struct nvkm_mc **);
index 5c96bd9808dd32f826aebb0eb886d2eaf1b282c9..be7633f36d6bd3bc1acdc92ff139390105295186 100644 (file)
@@ -146,7 +146,7 @@ nv11_chipset = {
        .gpio = nv10_gpio_new,
        .i2c = nv04_i2c_new,
        .imem = nv04_instmem_new,
-       .mc = nv04_mc_new,
+       .mc = nv11_mc_new,
        .mmu = nv04_mmu_new,
        .pci = nv04_pci_new,
        .timer = nv04_timer_new,
index dcb5d479089e5d4e028fd50a2f9664d883bfd179..49695ac7be2e66331a8b96fae726fff2e17c613f 100644 (file)
@@ -1,5 +1,6 @@
 nvkm-y += nvkm/subdev/mc/base.o
 nvkm-y += nvkm/subdev/mc/nv04.o
+nvkm-y += nvkm/subdev/mc/nv11.o
 nvkm-y += nvkm/subdev/mc/nv17.o
 nvkm-y += nvkm/subdev/mc/nv44.o
 nvkm-y += nvkm/subdev/mc/nv50.o
index 1300c8db068c1d962e6f3bd2e45f1c2f5b257e0c..4896c98b51b1043f354d8ee8c5fc0cbe7171f360 100644 (file)
  */
 #include "priv.h"
 
+const struct nvkm_mc_map
+nv04_mc_reset[] = {
+       { 0x00001000, NVKM_ENGINE_GR },
+       { 0x00000100, NVKM_ENGINE_FIFO },
+       {}
+};
+
 const struct nvkm_mc_map
 nv04_mc_intr[] = {
        { 0x00000001, NVKM_ENGINE_MPEG },       /* NV17- MPEG/ME */
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mc/nv11.c
new file mode 100644 (file)
index 0000000..55f0b91
--- /dev/null
@@ -0,0 +1,50 @@
+/*
+ * Copyright 2016 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs <bskeggs@redhat.com>
+ */
+#include "priv.h"
+
+static const struct nvkm_mc_map
+nv11_mc_intr[] = {
+       { 0x03010000, NVKM_ENGINE_DISP },
+       { 0x00001000, NVKM_ENGINE_GR },
+       { 0x00000100, NVKM_ENGINE_FIFO },
+       { 0x10000000, NVKM_SUBDEV_BUS },
+       { 0x00100000, NVKM_SUBDEV_TIMER },
+       {}
+};
+
+static const struct nvkm_mc_func
+nv11_mc = {
+       .init = nv04_mc_init,
+       .intr = nv11_mc_intr,
+       .intr_unarm = nv04_mc_intr_unarm,
+       .intr_rearm = nv04_mc_intr_rearm,
+       .intr_mask = nv04_mc_intr_mask,
+       .reset = nv04_mc_reset,
+};
+
+int
+nv11_mc_new(struct nvkm_device *device, int index, struct nvkm_mc **pmc)
+{
+       return nvkm_mc_new_(&nv11_mc, device, index, pmc);
+}
index 57d3e39be881e8b1a747c454cca53451c07f1696..645638a9d53aef2cf11c8c69316cb55a03d50cbc 100644 (file)
@@ -29,6 +29,7 @@ extern const struct nvkm_mc_map nv04_mc_intr[];
 void nv04_mc_intr_unarm(struct nvkm_mc *);
 void nv04_mc_intr_rearm(struct nvkm_mc *);
 u32 nv04_mc_intr_mask(struct nvkm_mc *);
+extern const struct nvkm_mc_map nv04_mc_reset[];
 
 extern const struct nvkm_mc_map nv17_mc_intr[];
 extern const struct nvkm_mc_map nv17_mc_reset[];