powerpc/64: Add L2 and L3 cache shape info

Retrieved from device-tree when available

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 823750fa6e664e50c998247c53d6d5c28331cb97..d7cf60f87604460505dfa36a4fa7e727b1d0dc29 100644 (file)
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -43,6 +43,8 @@ struct ppc_cache_info {
 struct ppc64_caches {
        struct ppc_cache_info l1d;
        struct ppc_cache_info l1i;
+       struct ppc_cache_info l2;
+       struct ppc_cache_info l3;
 };
 
 extern struct ppc64_caches ppc64_caches;

diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index b87dcb2968d915b885bc54b6a14a8e00fcc42dfa..db18f7b68a1d59b2f01ed64eb626df6a78cfbae1 100644 (file)
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -472,22 +472,38 @@ static bool __init parse_cache_info(struct device_node *np,
 
 void __init initialize_cache_info(void)
 {
-       struct device_node *np;
+       struct device_node *cpu, *l2, *l3 = NULL;
 
        DBG(" -> initialize_cache_info()\n");
 
-       np  = of_find_node_by_type(NULL, "cpu");
+       cpu = of_find_node_by_type(NULL, "cpu");
 
        /*
         * We're assuming *all* of the CPUs have the same
         * d-cache and i-cache sizes... -Peter
         */
-       if (np) {
-               if (!parse_cache_info(np, false, &ppc64_caches.l1d))
+       if (cpu) {
+               if (!parse_cache_info(cpu, false, &ppc64_caches.l1d))
                        DBG("Argh, can't find dcache properties !\n");
 
-               if (!parse_cache_info(np, true, &ppc64_caches.l1i))
+               if (!parse_cache_info(cpu, true, &ppc64_caches.l1i))
                        DBG("Argh, can't find icache properties !\n");
+
+               /*
+                * Try to find the L2 and L3 if any. Assume they are
+                * unified and use the D-side properties.
+                */
+               l2 = of_find_next_cache_node(cpu);
+               of_node_put(cpu);
+               if (l2) {
+                       parse_cache_info(l2, false, &ppc64_caches.l2);
+                       l3 = of_find_next_cache_node(l2);
+                       of_node_put(l2);
+               }
+               if (l3) {
+                       parse_cache_info(l3, false, &ppc64_caches.l3);
+                       of_node_put(l3);
+               }
        }
 
        /* For use by binfmt_elf */