ARM: dts: r8a7793: Add APMU node and second CPU core

Add DT nodes for the Advanced Power Management Unit (APMU) and the
second CPU core.  Use the enable-method to point out that the APMU
should be used for SMP support.

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a7793.dtsi b/arch/arm/boot/dts/r8a7793.dtsi
index 9b55c1c6ee31a49d5c2e22236a45ec4f017259c0..8d02aacf2892627155ea82c3f6414c614b33ebb5 100644 (file)
--- a/arch/arm/boot/dts/r8a7793.dtsi
+++ b/arch/arm/boot/dts/r8a7793.dtsi
@@ -35,6 +35,7 @@
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
+               enable-method = "renesas,apmu";
 
                cpu0: cpu@0 {
                        device_type = "cpu";
@@ -56,6 +57,14 @@
                        next-level-cache = <&L2_CA15>;
                };
 
+               cpu1: cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a15";
+                       reg = <1>;
+                       clock-frequency = <1500000000>;
+                       power-domains = <&sysc R8A7793_PD_CA15_CPU1>;
+               };
+
                L2_CA15: cache-controller@0 {
                        compatible = "cache";
                        reg = <0>;
@@ -65,6 +74,12 @@
                };
        };
 
+       apmu@e6152000 {
+               compatible = "renesas,r8a7793-apmu", "renesas,apmu";
+               reg = <0 0xe6152000 0 0x188>;
+               cpus = <&cpu0 &cpu1>;
+       };
+
        thermal-zones {
                cpu_thermal: cpu-thermal {
                        polling-delay-passive   = <0>;