mtd: nand: ifc: Fix location of eccstat registers for IFC V1.0
authorMark Marshall <mark.marshall@omicronenergy.com>
Thu, 26 Jan 2017 15:18:27 +0000 (16:18 +0100)
committerBoris Brezillon <boris.brezillon@free-electrons.com>
Mon, 6 Feb 2017 07:54:01 +0000 (08:54 +0100)
The commit 7a654172161c ("mtd/ifc: Add support for IFC controller
version 2.0") added support for version 2.0 of the IFC controller.
The version 2.0 controller has the ECC status registers at a different
location to the previous versions.

Correct the fsl_ifc_nand structure so that the ECC status can be read
from the correct location for both version 1.0 and 2.0 of the controller.

Cc: stable@vger.kernel.org
Fixes: 7a654172161c ("mtd/ifc: Add support for IFC controller version 2.0")
Signed-off-by: Mark Marshall <mark.marshall@omicronenergy.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
drivers/mtd/nand/fsl_ifc_nand.c
include/linux/fsl_ifc.h

index 0a177b1bfe3e77600b9fc9c943f6f961d195cd4f..d1570f512f0bbad5c07c9903528c125e412c029a 100644 (file)
@@ -258,9 +258,15 @@ static void fsl_ifc_run_command(struct mtd_info *mtd)
                int bufnum = nctrl->page & priv->bufnum_mask;
                int sector = bufnum * chip->ecc.steps;
                int sector_end = sector + chip->ecc.steps - 1;
+               __be32 *eccstat_regs;
+
+               if (ctrl->version >= FSL_IFC_VERSION_2_0_0)
+                       eccstat_regs = ifc->ifc_nand.v2_nand_eccstat;
+               else
+                       eccstat_regs = ifc->ifc_nand.v1_nand_eccstat;
 
                for (i = sector / 4; i <= sector_end / 4; i++)
-                       eccstat[i] = ifc_in32(&ifc->ifc_nand.nand_eccstat[i]);
+                       eccstat[i] = ifc_in32(&eccstat_regs[i]);
 
                for (i = sector; i <= sector_end; i++) {
                        errors = check_read_ecc(mtd, ctrl, eccstat, i);
index 3f9778cbc79d0b1bb3b73e0a12695b722fa7a179..c332f0a4560794225a538f2a45ed77f936472c46 100644 (file)
@@ -733,8 +733,12 @@ struct fsl_ifc_nand {
        __be32 nand_erattr1;
        u32 res19[0x10];
        __be32 nand_fsr;
-       u32 res20[0x3];
-       __be32 nand_eccstat[6];
+       u32 res20;
+       /* The V1 nand_eccstat is actually 4 words that overlaps the
+        * V2 nand_eccstat.
+        */
+       __be32 v1_nand_eccstat[2];
+       __be32 v2_nand_eccstat[6];
        u32 res21[0x1c];
        __be32 nanndcr;
        u32 res22[0x2];