MIPS: Probe watch registers and report configuration.
authorDavid Daney <ddaney@avtrex.com>
Tue, 23 Sep 2008 07:07:16 +0000 (00:07 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Sat, 11 Oct 2008 15:18:56 +0000 (16:18 +0100)
Probe for watch register characteristics, and report them in /proc/cpuinfo.

Signed-off-by: David Daney <ddaney@avtrex.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/cpu-probe.c
arch/mips/kernel/proc.c

index e621fda8ab37fad4847cb3a19ee238f415f82a91..0cf15457ecace15725e7b419438e57736540d2a6 100644 (file)
@@ -21,6 +21,7 @@
 #include <asm/fpu.h>
 #include <asm/mipsregs.h>
 #include <asm/system.h>
+#include <asm/watch.h>
 
 /*
  * Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
@@ -677,6 +678,7 @@ static inline void spram_config(void) {}
 static inline void cpu_probe_mips(struct cpuinfo_mips *c)
 {
        decode_configs(c);
+       mips_probe_watch_registers(c);
        switch (c->processor_id & 0xff00) {
        case PRID_IMP_4KC:
                c->cputype = CPU_4KC;
index 36f06539824304db22bc8f67a97e2b6034470026..75bb1300dd7aa0c12f7985a3986a69e9d49904f6 100644 (file)
@@ -23,6 +23,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
        unsigned int version = cpu_data[n].processor_id;
        unsigned int fp_vers = cpu_data[n].fpu_id;
        char fmt [64];
+       int i;
 
 #ifdef CONFIG_SMP
        if (!cpu_isset(n, cpu_online_map))
@@ -50,8 +51,16 @@ static int show_cpuinfo(struct seq_file *m, void *v)
        seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
        seq_printf(m, "extra interrupt vector\t: %s\n",
                      cpu_has_divec ? "yes" : "no");
-       seq_printf(m, "hardware watchpoint\t: %s\n",
-                     cpu_has_watch ? "yes" : "no");
+       seq_printf(m, "hardware watchpoint\t: %s",
+                  cpu_has_watch ? "yes, " : "no\n");
+       if (cpu_has_watch) {
+               seq_printf(m, "count: %d, address/irw mask: [",
+                          cpu_data[n].watch_reg_count);
+               for (i = 0; i < cpu_data[n].watch_reg_count; i++)
+                       seq_printf(m, "%s0x%04x", i ? ", " : "" ,
+                                  cpu_data[n].watch_reg_masks[i]);
+               seq_printf(m, "]\n");
+       }
        seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
                      cpu_has_mips16 ? " mips16" : "",
                      cpu_has_mdmx ? " mdmx" : "",