G12B: clock: fix mipi_csi_phy clk parent error

PD#165090: clock: Change parent clk name

Change-Id: Ib2a3416481f828e6ddb93ffaf6dc1dd26a2f6d78
Signed-off-by: Shunzhou Jiang <shunzhou.jiang@amlogic.com>

diff --git a/drivers/amlogic/clk/g12b/g12b.c b/drivers/amlogic/clk/g12b/g12b.c
index 9ca993f49e127778464b18ad1a5d53e5e805790f..9c7482c9805a3d1aa5668be4221497eaf37af578 100644 (file)
--- a/drivers/amlogic/clk/g12b/g12b.c
+++ b/drivers/amlogic/clk/g12b/g12b.c
@@ -128,6 +128,10 @@ static const char * const media_parent_names[] = { "xtal",
        "gp0_pll", "hifi_pll", "fclk_div2p5", "fclk_div3", "fclk_div4",
        "fclk_div5",  "fclk_div7"};
 
+static const char * const media_parent_names_mipi[] = { "xtal",
+       "gp0_pll", "mpll1", "mpll2", "fclk_div3", "fclk_div4",
+       "fclk_div5",  "fclk_div7"};
+
 static struct clk_mux cts_gdc_core_clk_mux = {
        .reg = (void *)HHI_APICALGDC_CNTL,
        .mask = 0x7,
@@ -343,7 +347,7 @@ static struct clk_mux cts_mipi_csi_phy_clk0_mux = {
        .hw.init = &(struct clk_init_data){
                .name = "cts_mipi_csi_phy_clk0_mux",
                .ops = &clk_mux_ops,
-               .parent_names = media_parent_names,
+               .parent_names = media_parent_names_mipi,
                .num_parents = 8,
                .flags = CLK_GET_RATE_NOCACHE,
        },
@@ -641,7 +645,7 @@ static void __init g12b_clkc_init(struct device_node *np)
 
        clks[CLKID_MIPI_CSI_PHY_CLK0_COMP] = clk_register_composite(NULL,
                "cts_mipi_csi_phy_clk0_composite",
-               media_parent_names, 8,
+               media_parent_names_mipi, 8,
                &cts_mipi_csi_phy_clk0_mux.hw,
                &clk_mux_ops,
                &cts_mipi_csi_phy_clk0_div.hw,