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[MIPS] SMTC: Synchronize cp0 counters on bootup.
author
Ralf Baechle
<ralf@linux-mips.org>
Wed, 1 Nov 2006 00:22:00 +0000
(
00:22
+0000)
committer
Ralf Baechle
<ralf@linux-mips.org>
Wed, 1 Nov 2006 17:46:09 +0000
(17:46 +0000)
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/smtc.c
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diff --git
a/arch/mips/kernel/smtc.c
b/arch/mips/kernel/smtc.c
index cc1f7474f7d7097fe042cb25fee23746e38c4606..3b78caf112f5d5c361bdb82fb0c1f455fb9a9cf2 100644
(file)
--- a/
arch/mips/kernel/smtc.c
+++ b/
arch/mips/kernel/smtc.c
@@
-476,6
+476,7
@@
void mipsmt_prepare_cpus(void)
write_vpe_c0_compare(0);
/* Propagate Config7 */
write_vpe_c0_config7(read_c0_config7());
+ write_vpe_c0_count(read_c0_count());
}
/* enable multi-threading within VPE */
write_vpe_c0_vpecontrol(read_vpe_c0_vpecontrol() | VPECONTROL_TE);