ARM: mvebu: use clocks property for serial ports
authorThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Fri, 18 Apr 2014 07:41:46 +0000 (09:41 +0200)
committerJason Cooper <jason@lakedaemon.net>
Sat, 26 Apr 2014 00:34:33 +0000 (00:34 +0000)
Back when the Armada 370 and Armada XP initial support was introduced,
the only way to pass the clock frequency to the of_serial driver was
through a clock-frequency Device Tree property.

Thanks to 0bbeb3c3e84bc963d1c66661e082d207023b0e5c ('of serial port
driver - add clk_get_rate() support'), it is possible to use the
standard 'clocks' DT property to reference the clock used for a
particular UART controller. This clock is then used by the of_serial
driver to retrieve the clock rate.

This commit modifies the SoC-level Device Tree files of Armada 370,
Armada XP, Armada 375 and Armada 38x to use this possibility. Since
there is no gatable clock for the UART controllers, we simply
reference the TCLK, which is the main SoC clock for the peripherals.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Link: https://lkml.kernel.org/r/1397806908-7550-4-git-send-email-thomas.petazzoni@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
arch/arm/boot/dts/armada-370-xp.dtsi
arch/arm/boot/dts/armada-375.dtsi
arch/arm/boot/dts/armada-38x.dtsi
arch/arm/boot/dts/armada-xp.dtsi

index 10d778605ea7be74ae6cab2441fce93719726e83..46aaee7f8df229dd7ba1d07604918e0bf4388f80 100644 (file)
                                reg-shift = <2>;
                                interrupts = <41>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
                        serial@12100 {
                                reg-shift = <2>;
                                interrupts = <42>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
 
index a7e0d543dff1ed52f89b3d3924ef442a8624099a..6a3b7410817e4b445f896b94bcfdbf297a97145d 100644 (file)
                                reg-shift = <2>;
                                interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
 
                                reg-shift = <2>;
                                interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
 
index 7c3f3ddd9096f0214b53590b3ca14e556296fbcf..0796cde504e7026365e4da6d8de262faeab957e7 100644 (file)
                                reg-shift = <2>;
                                interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
 
                                reg-shift = <2>;
                                interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
 
index 0a7dff6519ce52645ead74d6b772bd623f0337b0..5902e8359c9165c33cc265b0a304df33acb640b5 100644 (file)
@@ -58,6 +58,7 @@
                                reg-shift = <2>;
                                interrupts = <43>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };
                        serial@12300 {
@@ -66,6 +67,7 @@
                                reg-shift = <2>;
                                interrupts = <44>;
                                reg-io-width = <1>;
+                               clocks = <&coreclk 0>;
                                status = "disabled";
                        };