ath9k_hw: reduce delay on programming INI on AR9003

All AR9003 devices are PCI-E only, the extra delay here
is not required and only reduces the delay for loading
the initial register values by at least 14ms.

Signed-off-by: Luis R. Rodriguez <lrodriguez@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index bababbe1edea07027c2126261d0eda81dd87e65d..19bc05c41136baf39a676b1a3fa8abd4000d8b46 100644 (file)
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -543,15 +543,6 @@ static void ar9003_hw_prog_ini(struct ath_hw *ah,
                u32 val = INI_RA(iniArr, i, column);
 
                REG_WRITE(ah, reg, val);
-
-               /*
-                * Determine if this is a shift register value, and insert the
-                * configured delay if so.
-                */
-               if (reg >= 0x16000 && reg < 0x17000
-                   && ah->config.analog_shiftreg)
-                       udelay(100);
-
                DO_DELAY(regWrites);
        }
 }