ASoC: remove bogus SLEEP mode from wm8978 driver

Tests showed, that bit 6 of the WM8978_POWER_MANAGEMENT_2 register of wm8978
affects codec clocks. Being useless for suspend / resume, it cannot be used in
bias-level control either. Remove this bit handling.

Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Liam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>

diff --git a/sound/soc/codecs/wm8978.c b/sound/soc/codecs/wm8978.c
index d9d4e9dd1adba81bc13f6e7ede754553d90cb8ea..8dcebaa8604a32c4018c9c0084bbc35b4fb86f83 100644 (file)
--- a/sound/soc/codecs/wm8978.c
+++ b/sound/soc/codecs/wm8978.c
@@ -873,8 +873,6 @@ static int wm8978_suspend(struct platform_device *pdev, pm_message_t state)
        wm8978_set_bias_level(codec, SND_SOC_BIAS_OFF);
        /* Also switch PLL off */
        snd_soc_write(codec, WM8978_POWER_MANAGEMENT_1, 0);
-       /* Put to sleep */
-       snd_soc_write(codec, WM8978_POWER_MANAGEMENT_2, 0x40);
 
        return 0;
 }
@@ -887,9 +885,6 @@ static int wm8978_resume(struct platform_device *pdev)
        int i;
        u16 *cache = codec->reg_cache;
 
-       /* Wake up the codec */
-       snd_soc_write(codec, WM8978_POWER_MANAGEMENT_2, 0);
-
        /* Sync reg_cache with the hardware */
        for (i = 0; i < ARRAY_SIZE(wm8978_reg); i++) {
                if (i == WM8978_RESET)