arm64: mm: Prevent mismatched 52-bit VA support
authorSteve Capper <steve.capper@arm.com>
Thu, 6 Dec 2018 22:50:40 +0000 (22:50 +0000)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 5 Dec 2019 14:37:12 +0000 (15:37 +0100)
[ Upstream commit a96a33b1ca57dbea4285893dedf290aeb8eb090b ]

For cases where there is a mismatch in ARMv8.2-LVA support between CPUs
we have to be careful in allowing secondary CPUs to boot if 52-bit
virtual addresses have already been enabled on the boot CPU.

This patch adds code to the secondary startup path. If the boot CPU has
enabled 52-bit VAs then ID_AA64MMFR2_EL1 is checked to see if the
secondary can also enable 52-bit support. If not, the secondary is
prevented from booting and an error message is displayed indicating why.

Technically this patch could be implemented using the cpufeature code
when considering 52-bit userspace support. However, we employ low level
checks here as the cpufeature code won't be able to run if we have
mismatched 52-bit kernel va support.

Signed-off-by: Steve Capper <steve.capper@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
arch/arm64/kernel/head.S
arch/arm64/kernel/smp.c

index 92cc7b51f10024c77404bb8e294e45e67a2d8e32..9c00fd2acc2a447ceaa19a98a66be18484ab6766 100644 (file)
@@ -594,6 +594,7 @@ secondary_startup:
        /*
         * Common entry point for secondary CPUs.
         */
+       bl      __cpu_secondary_check52bitva
        bl      __cpu_setup                     // initialise processor
        bl      __enable_mmu
        ldr     x8, =__secondary_switched
@@ -668,6 +669,31 @@ ENTRY(__enable_mmu)
        ret
 ENDPROC(__enable_mmu)
 
+ENTRY(__cpu_secondary_check52bitva)
+#ifdef CONFIG_ARM64_52BIT_VA
+       ldr_l   x0, vabits_user
+       cmp     x0, #52
+       b.ne    2f
+
+       mrs_s   x0, SYS_ID_AA64MMFR2_EL1
+       and     x0, x0, #(0xf << ID_AA64MMFR2_LVA_SHIFT)
+       cbnz    x0, 2f
+
+       adr_l   x0, va52mismatch
+       mov     w1, #1
+       strb    w1, [x0]
+       dmb     sy
+       dc      ivac, x0        // Invalidate potentially stale cache line
+
+       update_early_cpu_boot_status CPU_STUCK_IN_KERNEL, x0, x1
+1:     wfe
+       wfi
+       b       1b
+
+#endif
+2:     ret
+ENDPROC(__cpu_secondary_check52bitva)
+
 __no_granule_support:
        /* Indicate that this CPU can't boot and is stuck in the kernel */
        update_early_cpu_boot_status CPU_STUCK_IN_KERNEL, x1, x2
index a683cd49951579a988a4f6503cdc5bc4614cabf6..0881dfab10f8fabd6d94c8ec57763851ae915155 100644 (file)
@@ -106,6 +106,7 @@ static int boot_secondary(unsigned int cpu, struct task_struct *idle)
 }
 
 static DECLARE_COMPLETION(cpu_running);
+bool va52mismatch __ro_after_init;
 
 int __cpu_up(unsigned int cpu, struct task_struct *idle)
 {
@@ -135,6 +136,10 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle)
 
                if (!cpu_online(cpu)) {
                        pr_crit("CPU%u: failed to come online\n", cpu);
+
+                       if (IS_ENABLED(CONFIG_ARM64_52BIT_VA) && va52mismatch)
+                               pr_crit("CPU%u: does not support 52-bit VAs\n", cpu);
+
                        ret = -EIO;
                }
        } else {