tg3 / broadcom: Add PHY_BRCM_CLEAR_RGMII_MODE flag
authorMatt Carlson <mcarlson@broadcom.com>
Mon, 2 Nov 2009 14:30:40 +0000 (14:30 +0000)
committerDavid S. Miller <davem@davemloft.net>
Tue, 3 Nov 2009 07:39:11 +0000 (23:39 -0800)
Broadcom 50610M parts changed the default definitions of the RGMII mode
shadow register.  The 5785 needs the RGMII mode selection bits [4:3]
cleared.

The default value of the remaining bits in this register are zero.
Rather than unnecessarily burn an extra bit in the dev_flags member in
an attempt to enumerate all possible combinations, this patch take a
more course grained approach and labels the option as "clear all bits".

Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/phy/broadcom.c
drivers/net/tg3.c
include/linux/brcmphy.h

index ace0ccc87a00e5ee50db8f5779a91ed5250430cb..5d2a2e90aba88856f4457e67c57eaa8cabf0d27e 100644 (file)
 #define BCM5482_SHD_LEDS1_LED3(src)    ((src & 0xf) << 4)
                                        /* LED1 / ~LINKSPD[1] selector */
 #define BCM5482_SHD_LEDS1_LED1(src)    ((src & 0xf) << 0)
+#define BCM54XX_SHD_RGMII_MODE 0x0b    /* 01011: RGMII Mode Selector */
 #define BCM5482_SHD_SSD                0x14    /* 10100: Secondary SerDes control */
 #define BCM5482_SHD_SSD_LEDM   0x0008  /* SSD LED Mode enable */
 #define BCM5482_SHD_SSD_EN     0x0001  /* SSD enable */
@@ -330,6 +331,11 @@ static int bcm54xx_config_init(struct phy_device *phydev)
        if (err < 0)
                return err;
 
+       if ((BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610 ||
+            BRCM_PHY_MODEL(phydev) == PHY_ID_BCM50610M) &&
+           (phydev->dev_flags & PHY_BRCM_CLEAR_RGMII_MODE))
+               bcm54xx_shadow_write(phydev, BCM54XX_SHD_RGMII_MODE, 0);
+
        bcm54xx_phydsp_config(phydev);
 
        return 0;
index 0aecd07d3f6b282ad729ce439551439c1017cc9d..e7128f6ae2d8a9efff38bc3681bc6cce59579a47 100644 (file)
@@ -1100,6 +1100,7 @@ static int tg3_mdio_init(struct tg3 *tp)
                break;
        case TG3_PHY_ID_BCM50610:
        case TG3_PHY_ID_BCM50610M:
+               phydev->dev_flags |= PHY_BRCM_CLEAR_RGMII_MODE;
                if (tp->tg3_flags3 & TG3_FLG3_RGMII_STD_IBND_DISABLE)
                        phydev->dev_flags |= PHY_BRCM_STD_IBND_DISABLE;
                if (tp->tg3_flags3 & TG3_FLG3_RGMII_EXT_IBND_RX_EN)
index daa1480fcf496c03afb5ec6c85d57d42c948cdff..6e7ffcee9c8089e1dfe93298ff299d0b11017bbd 100644 (file)
@@ -8,4 +8,5 @@
 #define PHY_BRCM_STD_IBND_DISABLE      0x00000800
 #define PHY_BRCM_EXT_IBND_RX_ENABLE    0x00001000
 #define PHY_BRCM_EXT_IBND_TX_ENABLE    0x00002000
+#define PHY_BRCM_CLEAR_RGMII_MODE      0x00004000
 #define PHY_BCM_FLAGS_VALID            0x80000000